SM320VC33, SMJ320VC33

SGUS034F – FEBRUARY 2001 – REVISED JUNE 2015

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Table of Contents

Executing LDFI or LDII ........................................... 14

1

Features .................................................................. 1

6.21

Switching Characteristics for XF0 when Executing

2

Description ............................................................. 1

STFI or STII ............................................................. 14

3

Revision History..................................................... 2

6.22

Switching Characteristics for XF0 and XF1 when

4

Description (continued)......................................... 3

Executing SIGI ......................................................... 14

5

Pin Configuration and Functions ......................... 3

6.23

Switching Characteristics for Loading when XF is

Configured as an Output.......................................... 15

6

Specifications......................................................... 7

6.24

Switching Characteristics for Changing XFx from

6.1

Absolute Maximum Ratings ...................................... 7

Output to Input Mode ............................................... 15

6.2

Recommended Operating Conditions ....................... 7

6.25

Switching Characteristics for Changing XFx from an

6.3

Electrical Characteristics........................................... 8

Input to an Output .................................................... 15

6.4

Phase-Locked Loop Characteristics Using EXTCLK

6.26

Switching Characteristics for RESET.................... 15

or On-Chip Crystal Oscillator Timing Requirements.. 9

6.27

Switching Characteristics for IACK ....................... 15

6.5

Circuit Parameters for On-Chip Crystal Oscillator

6.28

Switching Characteristics for Serial Port............... 16

Timing Requirements ................................................. 9

6.29

Switching Characteristics for HOLD/HOLDA ........ 16

6.6

Timing Requirements for EXTCLK, All Modes........ 10

6.30

Switching Characteristics for Peripheral Pin

6.7

Timing Requirements for Memory Read/Write for

General-Purpose I/O ................................................ 16

STRB........................................................................ 10

6.31

Switching Characteristics for Timer Pin ................ 16

6.8

Timing Requirements for XF0 and XF1 when

Executing LDFI or LDII............................................. 10

6.32

Switching Characteristics for SHZ ........................ 17

6.9

Timing Requirements for XF0 and XF1 when

7

Parameter Measurement Information ................ 18

Executing SIGI ......................................................... 11

8

Detailed Description ............................................ 29

6.10

Timing Requirements for Changing XFx from Output

8.1

Functional Block Diagram ....................................... 29

to Input Mode ........................................................... 11

8.2

Feature Description................................................. 30

6.11

Timing Requirements for RESET.......................... 11

8.3

Register Maps ......................................................... 41

6.12

Timing Requirements for INT3 to INT0 Response 11

9

Power Supply Recommendations ...................... 44

6.13

Timing Requirements for Serial Port..................... 12

9.1

Power Sequencing Considerations ......................... 44

6.14

Timing Requirements for HOLD/HOLDA .............. 13

10

Device and Documentation Support ................. 45

6.15

Timing Requirements for Peripheral Pin General-

Purpose I/O .............................................................. 13

10.1

Third-Party Products Disclaimer ........................... 45

6.16

Timing Requirements for Timer Pin ...................... 13

10.2

Device Support...................................................... 45

6.17

Timing Requirements for IEEE-1149.1 Test Access

10.3

Related Links ........................................................ 47

Port........................................................................... 13

10.4

Community Resources.......................................... 47

6.18

Switching Characteristics for EXTCLK, All Modes

10.5

Trademarks ........................................................... 48

................................................................................. 14

10.6

Electrostatic Discharge Caution ............................ 48

6.19

Switching Characteristics for Memory Read/Write

10.7

Glossary ................................................................ 48

for STRB .................................................................. 14

11

Mechanical, Packaging, and Orderable

6.20

Switching Characteristics for XF0 and XF1 when

Information ........................................................... 48

3 Revision History

Changes from Revision E (October 2002) to Revision F

Page

•

Added to Features list and updated Description .................................................................................................................... 1

•

Added Feature Description section, Power Supply Recommendations section, Device and Documentation Support

section, and Mechanical, Packaging, and Orderable Information section .......................................................................... 30

•

Corrected figure reference in PLL Isolation ......................................................................................................................... 32

•

Added more detail to Clock and PLL Considerations on Initialization ................................................................................. 33

•

Updated note in Interrupt-Acknowledge Timing .................................................................................................................. 39

2

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