CC2541 datasheet(12/37 Pages) TI2

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RESET_N

Px.n

T0299-01

CC2541

SWRS110D – JANUARY 2012 – REVISED JUNE 2013

www.ti.com

ADC CHARACTERISTICS (continued)

TA = 25°C and VDD = 3 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Power consumption

1.2

Internal reference VDD coefficient

mV/V

Internal reference temperature

0.4

mV/10°C

coefficient

Internal reference voltage

1.24

CONTROL INPUT AC CHARACTERISTICS

TA = –40°C to 85°C, VDD = 2 V to 3.6 V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

The undivided system clock is 32 MHz when crystal oscillator is used.

System clock, fSYSCLK

The undivided system clock is 16 MHz when calibrated 16-MHz RC

MHz

tSYSCLK = 1/ fSYSCLK

oscillator is used.

See item 1, Figure 2. This is the shortest pulse that is recognized as

a complete reset pin request. Note that shorter pulses may be

RESET_N low duration

µs

recognized but do not lead to complete reset of all modules within the

chip.

See item 2, Figure 2.This is the shortest pulse that is recognized as

Interrupt pulse duration

an interrupt request.

Figure 2. Control Input AC Characteristics

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