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TPSM843521 Datasheet(PDF) 39 Page - Texas Instruments |
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TPSM843521 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 41 page ![]() www.ti.com EXAMPLE BOARD LAYOUT .000 PKG 0 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND ( ) 0.463 ( ) 0.975 ( ) 1.475 2X ( ) 0.665 2X ( ) 1.165 2X ( ) 1.665 2X ( ) 2.05 2X ( ) 0.125 ( ) 1.65 ( ) 0.975 ( ) 1.475 4X (0.25) (0.275) 8X (0.25) (0.4) TYP 4X ( ) 0.325 4X ( ) 1.113 4X ( ) 1.9 2X (0.8) (R0.05) TYP (R0.05) TYP ( 0.2) TYP VIA 3X ( ) 2.45 (0.3) 2X (0.35) (0.55) QFN-FCMOD - 2.05 mm max height RCJ0009A PLASTIC QUAD FLATPACK - NO LEAD 4229161/B 04/2023 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. LAND PATTERN EXAMPLE SCALE: 20X (45 X 0.19) 1 4 5 6 7 9 METAL UNDER SOLDER MASK TYP SOLDER MASK OPENING TYP METAL EDGE SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED PADS:1-3 & 7-9 SOLDER MASK DETAILS METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL SOLDER MASK DEFINED PADS: 4-6 |
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