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ADC31RF80 Datasheet(PDF) 65 Page - Texas Instruments

Part # ADC31RF80
Description  ADC31RF80 3-GSPS Telecom Receiver and Feedback Device
PDF  142 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADC31RF80 Datasheet(HTML) 65 Page - Texas Instruments

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R/W
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
SDIN
SCLK
SEN
RESET
A11 A10
A9
A8
A7
A6
M
P
CH
0
1
0
0
Register Address [11:0]
Register Data [7:0]
65
ADC31RF80
www.ti.com
SBAS860 – AUGUST 2017
Product Folder Links: ADC31RF80
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
8.4.3.3 Serial Register Write: Digital Bank
The digital bank contains four pages (the offset corrector page, digital gain page, main digital page, and JESD
digital page). Figure 138 shows the timing for the individual page selection. The registers located in the pages of
the digital bank can be programmed by:
1. Driving the SEN pin low.
2. Setting the M bit to 1 and specifying the page with with the desired register. There are seven pages in Digital
Bank. These pages can be selected by appropriately programming register bits DIGITAL BANK PAGE SEL,
located in addresses 002h, 003h, and 004h, using three consecutive SPI cycles. Addressing in a SPI cycle
begins with 4xxx when selecting a page from digital bank because the M bit must be set to 1.
–
To select the offset corrector page: write address 4004h with 61h, 4003h with 00h, and 4002h with 00h.
–
To select the digital gain page: write address 4004h with 61h, 4003h with 00h, and 4002h with 05h.
–
To select the main digital page: write address 4004h with 68h, 4003h with 00h, and 4002h with 00h.
–
To select the JESD digital page: write address 4004h with 69h, 4003h with 00h, and 4002h with 00h.
Figure 138. SPI Write Timing Diagram for Digital Bank Page Selection



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