L9965TS datasheet(44/62 Pages) STMICROELECTRONICS

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IC STATE

IC reaction upon frame receipt

•

GEN_STATUS2.WAKEUP_FAULT_VIF = 1

DEEPSLEEP

•

Device moves to NORMAL within TVIF_WAKEUP_TIME

•

FLT pin is asserted

•

GEN_STATUS2.WAKEUP_FAULT_VIF = 1

5.8.4

Device identification (DEVICE_NAME)

The Isolated Vertical Interface (VIF) allows populating the bus with different devices of the L9965x family. To

enable the MCU quickly recognizing the device type and launching the proper initialization, configuration and

diagnostic procedures, the CHIP_ID.NAME_ID register holds a unique code identifying the product type.

Specifically, NAME_ID = 0x17 identifies the L9965T.

In the same register are also available the following fields: CHIP_ID.SILICON_ID and CHIP_ID.METAL_ID

identifying the version of the silicon.

5.9

Output pins

5.9.1

BNE

BNE is a push-pull output pin, it’s functional in NORMAL state and Hi-Z in all other states. in NORMAL state this

pin output the information on Buffer Not Empty to implement interrupt-based communication with the MCU. When

high, it means that the RX FIFO stores at least one frame. The default value is LOW.

BNE value can be read in the bit GEN_STATUS3.BNE.

Figure 17. BNE pin structure

5.9.2

FLT

FLT is a push-pull output pin, it’s functional in NORMAL state and Hi-Z in all other states.

Its purpose is to implement interrupt-based communication with the MCU. The default value is LOW.

When FLT pin and SPI FAULT are HIGH, it means that a fault tone has been received on VIF or an internal

L9965T fault, according to mask register GEN_CFG3 configuration, has been detected. The default value is LOW.

L9965T/L9965TS

Functional description

DS14987 - Rev 1

page 44/62

L9965TS Datasheet(PDF) 44 Page - STMicroelectronics