L9965TS datasheet(16/62 Pages) STMICROELECTRONICS

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5.1.2.1

CYCLIC_WAKEUP State operation

To configure CYCLIC_WAKEUP state the following procedure must be followed.

Procedure 1: Set up of CYCLIC_WAKEUP state

1. Program the proper TCYCLIC_ WAKEUP in GEN_CFG5.WAKEUP_CYCLIC_TIMEOUT_SENDER_SEL register

2. Enable the CYCLIC_WAKEUP by setting the GEN_CFG5.WAKEUP_CYCLIC_ENB bit in GEN_CFG5 register

3. Send a global broadcast GO2SLP command (Section 5.8.3.3) to move all the ICs in low power mode

4. L9965T/TS moves to CYCLIC_COUNT state. The value of the cyclic counter during CYCLIC_COUNT state is

stored in GEN_STATUS2.WAKEUP_CYCLIC_TRX_COUNTER. The LSB of this register is 4.096e-3 seconds.

Step 1, 2 and 3 of the above procedure must be applied on both channels of the L9965T if configured in ring

topology.

The system operates as shown in Figure 8 according to the daisy-chain topology.

Ring topology:

•

Dual transceiver scenario: the two L9965T channels should be configured by the MCU in sender (setting

GEN_CFG5.WAKEUP_CYCLIC_SENDER bit) and listener (setting CFG5.WAKEUP_CYCLIC_ LISTENER

bit) modes.

•

Single transceiver scenario: If the devices are connected in single access daisy chain, the last L9965A

device in the chain can be configured to propagate backward the CYCLIC_WAKEUP tone. In this case the

single transceiver channel should be configured by the MCU in sender (setting

GEN_CFG5.WAKEUP_CYCLIC_SENDER bit).

•

As sender, the transceiver has the VIF RX and VIF TX both enabled. After TCYCLIC_WAKEUP the sender

moves from CYCLIC_COUNT to CYCLIC_WAKEUP state, performs the internal diagnosis (see

Section 5.1.2.2) and, if no faults are present, it sends a CYCLIC_WAKEUP tone on the VIF to wake up one

by one the devices on the daisy chain, then changes his role to listener, set the timer threshold at

TCYCLIC_WAKEUP_TIMEOUT, and moves again to CYCLIC_COUNT state.

•

The listener (can be either the The transceiver channel on the opposite end of the ring, or the single

transceiver switched from sender in the previous step) has the VIF RX enabled and VIF TX disabled. If the

CYCLIC_WAKEUP tone arrives within TCYCLIC_WAKEUP_TIMEOUT, the “no fault” condition is acknowledged,

the listener changes his role to sender, the timer is reset to count until TCYCLIC_WAKEUP and the cycle starts

again in the opposite direction.

•

If the CYCLIC_WAKEUP tone is not received within TCYCLIC_WAKEUP_TIMEOUT when transceiver is listener,

it moves to NORMAL state and asserts the WKP and FLT pins (to wake up the MCU) and set

GEN_STATUS2.WAKEUP_CYCLIC_TRX_TIMEOUT bit.

•

If during the internal diagnosis phase a fault is asserted, the device moves to NORMAL state. According to

fault detection mask registers GEN_CFG2 and GEN_CFG3, fault detection is notified by the FLT pin

(asserted HIGH) and reported on the FAULT bit of the SPI MISO frame shown in Table 26. Depending on

its configuration (see Section 5.9.3) also WKP pin may be asserted HIGH in case of faults. In this case no

CYCLIC_WAKEUP tone is generated.

Single access: L9965TS channel moves to CYCLIC_WAKEUP state, performs the diagnostics in Section 5.1.2.2

and generates a CYCLIC_WAKEUP tone every TCYCLIC_WAKEUP period. The transceiver is sensitive to fault

wakeup from VIF and wakeup by MCU.

L9965T/L9965TS

Functional description

DS14987 - Rev 1

page 16/62

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