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INA351 Datasheet(PDF) 31 Page - Texas Instruments |
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INA351 Datasheet(HTML) 31 Page - Texas Instruments |
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31 / 48 page ![]() 8.4.2 Layout Example Use ground pours for shielding the input signal pairs 1 GS 8 SHDN 2 –IN 7 VS+ 3 +IN 6 OUT 4 VS 5 REF R1 R2 C1 C2 GND GND +V –IN +IN OUT Input traces routed adjacent to each other – V Ground plane removed at gain resistor to minimize parasitic capacitance Low-impedance connection for reference terminal Place bypass capacitors as close to IC as possible +IN –IN +V OUT –V R1 R2 C1 C2 INA351ABS GND _____ Figure 8-7. Example Schematic and Associated PCB Layout www.ti.com INA351 SBOSAD5D – DECEMBER 2022 – REVISED NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: INA351 |
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