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LMC555 Datasheet(PDF) 4 Page - Texas Instruments

Part # LMC555
Description  LMC555 CMOS Timer
PDF  35 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LMC555 Datasheet(HTML) 4 Page - Texas Instruments

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5 Specifications
5.1 Absolute Maximum Ratings
over operating free-air temperature range, unless otherwise noted.(1) (2) (3)
MIN
MAX
UNIT
Voltage
Supply
15
V
Input
–0.3
(V+) + 0.3
Output
15
Current
Output
100
mA
Storage temperature, Tstg
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Section 5.3.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
See AN-1112 (SNVA009) for DSBGA considerations.
(3)
If military- or aerospace-specified devices are required, contact the TI Sales Office or Distributors for availability and specifications.
5.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±1500
V
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
5.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
Temperature
LMC555IM
−40
125
°C
LMC555CM, MM, N, TP
−40
85
Maximum allowable power dissipation at
25°C  
PDIP-8
1126
mW
SOIC-8
740
VSSOP-8
555
8-bump DSBGA
568
5.4 Thermal Information
THERMAL METRIC(1)
LMC555
UNIT
D
(SOIC)
DGK
(VSSOP)
P
(PDIP)
YPB
(DSBGA)
8 PINS
8 PINS
8 PINS
8 PINS
RθJA
Junction-to-ambient thermal resistance
138.9
188.3
93.1
102.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
78.8
78.8
82.5
0.9
°C/W
RθJB
Junction-to-board thermal resistance
87.9
110.2
69.6
31.2
°C/W
ψJT
Junction-to-top characterization parameter
23.2
18.5
52.0
0.5
°C/W
ψJB
Junction-to-board characterization parameter
86.9
108.6
69.2
31.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
N/A
°C/W
(1)
For information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
LMC555
SNAS558N – JANUARY 2000 – REVISED MARCH 2024
www.ti.com
4
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Product Folder Links: LMC555



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