LMX2572LP datasheet(4/83 Pages) TI2

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LMX2572LP

SNAS764 – MAY 2018

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Pin Functions (continued)

I/O

DESCRIPTION

NAME

NO.

SDI

Input

SPI data. High impedance CMOS input. 1.8-V to 3.3-V logic.

SYNC

Input

Phase synchronization trigger. Configurable to accept CMOS input (1.8-V to 3.3-V logic) or

differential input.

SysRefReq

Input

FSK I2S Frame Sync input. High impedance CMOS input. 1.8-V to 3.3-V logic.

VbiasVARAC

Bypass

VCO Varactor bias. Connect a 10-µF decoupling capacitor to VCO ground.

VbiasVCO

Bypass

VCO bias. Connect a 470-nF (X7R) decoupling capacitor to VCO ground as close to this pin

as possible.

VbiasVCO2

Bypass

VCO bias. Connect a 100-nF (X7R) decoupling capacitor to VCO ground.

VccBUF

Supply

Supply for output buffers. Connect a 0.1-µF decoupling capacitor to RF ground.

VccCP

Supply

Supply for charge pump. Connect a 0.1-µF decoupling capacitor to charge pump ground.

VccDIG

Supply

Digital power supply. Connect a 0.1-µF decoupling capacitor to digital ground.

VccMASH

Supply

Digital power supply. Connect a 1-µF decoupling capacitor to digital ground.

VccVCO

Supply

Supply for VCO. Connect a 1-µF decoupling capacitor to VCO ground.

VccVCO2

Supply

Supply for VCO. Connect a 1-µF decoupling capacitor to VCO ground.

VrefVCO

Bypass

VCO supply reference. Connect a 10-µF decoupling capacitor to VCO ground.

VrefVCO2

Bypass

VCO supply reference. Connect a 10-µF decoupling capacitor to VCO ground.

VregIN

Bypass

Input reference path regulator output. Connect a 1-µF decoupling capacitor to RF ground as

close to this pin as possible.

VregVCO

Bypass

VCO regulator node. Connect a 10-nF decoupling capacitor to VCO ground.

Vtune

Input

VCO tuning voltage input. Connect a 1.5-nF or more capacitor to VCO ground. See External

Loop Filter for details.

(1)

Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VCC

Power supply voltage

–0.3

3.6

VIN

IO input voltage

VCC + 0.3

Junction temperature

150

°C

Tstg

Storage temperature

–65

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per

ANSI/ESDA/JEDEC JS-001, all pins(1)

±2000

Charged device model (CDM), per JEDEC

specification JESD22-C101, all pins(2)

±500

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

Ambient temperature

–40

°C

Junction temperature

125

°C

LMX2572LP Datasheet(PDF) 4 Page - Texas Instruments

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