OUTPUT A

-IN A

+IN A

V±

OUTPUT B

-IN B

+IN B

V+

VS±

GND

Ground (GND) plane on another layer

Keep input traces short

and run the input traces

as far away from

the supply lines

as possible.

Place components

close to device and to

each other to reduce

parasitic errors.

Use low-ESR,

ceramic bypass

capacitor. Place as

close to the device

as possible.

VIN A

GND

RF

RG

VIN B

GND

RF

RG

VS+

GND

Output A

Output B

(Schematic Representation)

+

VIN B

VOUT B

RG

RF

+

VIN A

VOUT A

RG

RF

Use low-ESR,

ceramic bypass

capacitor. Place as

close to the device

as possible.

24

OPA2156

SBOS900B – SEPTEMBER 2018 – REVISED JUNE 2019

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Copyright © 2018–2019, Texas Instruments Incorporated

Layout Guidelines (continued)

The OPA2156 has an internal thermal protection feature which prevents it from being damaged due to self

heating, or the internal heating generated during normal operation. The protection circuitry works by monitoring

the temperature of the output stage and turns of the output drive if the junction temperature of the device rises to

approximately 170°C. The device has a thermal hysteresis of approximately 15°C, which allows the device to

safely cool down before returning to normal operation at approximately 155°C. TI recommends that the system

design takes into account the thermal dissipation of the OPA2156 to ensure that the recommended operating

junction temperature of 125°C is not exceeded to avoid decreasing the lifespan of the device or permanently

damaging the amplifier.

10.2 Layout Example

Figure 50. Operational Amplifier Board Layout for Noninverting Configuration