OPA2156 datasheet(7/38 Pages) TI2

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OPA2156

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SBOS900B – SEPTEMBER 2018 – REVISED JUNE 2019

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6.6 Typical Characteristics

Table 1. Table of Graphs

DESCRIPTION

FIGURE

Offset Voltage Production Distribution

Figure 1

Offset Voltage vs Temperature (PMOS)

Figure 2

Offset Voltage vs Temperature (NMOS)

Figure 3

Offset Voltage vs Power Supply

Figure 4

Offset Voltage vs Common-Mode Voltage

Figure 5

Offset Voltage vs Common-Mode Voltage in Transition Region

Figure 6

Offset Voltage Drift

Figure 7

Input Voltage Noise Spectral Density

Figure 8

0.1-Hz to 10-Hz Noise

Figure 9

THD+N vs Frequency

Figure 10

THD+N vs Output Amplitude

Figure 11

Input Bias and Offset Current vs Common-Mode Voltage

Figure 12

Input Bias and Offset Current vs Temperature

Figure 13

Input Bias and Offset Current vs Temperature

Figure 14

Open-Loop Output Impedance vs Frequency

Figure 15

Maximum Output Voltage vs Frequency

Figure 16

Open-Loop Gain and Phase Vs Frequency

Figure 17

Open-Loop Gain vs Temperature

Figure 18

Closed-Loop Gain vs Frequency

Figure 19

CMRR vs Frequency

Figure 20

PSRR vs Frequency

Figure 21

CMRR vs Temperature

Figure 22

PSRR vs Temperature

Figure 23

Positive Output Voltage vs Output Current

Figure 24

Negative Output Voltage vs Output Current

Figure 26

Short-Circuit Current vs Temperature

Figure 25

No Phase Reversal

Figure 27

Phase Margin vs Capacitive Load

Figure 28

Small-Signal Overshoot vs Capacitive Load (G = –1)

Figure 29

Small-Signal Overshoot vs Capacitive Load (G= +1)

Figure 30

Settling Time

Figure 31

Negative Overload Recovery

Figure 32

Positive Overload Recovery

Figure 33

Small-Signal Step Response (Noninverting)

Figure 34

Small-Signal Step Response (Inverting)

Figure 35

Large-Signal Step Response (Noninverting)

Figure 36

Large-Signal Step Response (Inverting)

Figure 37

Quiescent Current vs Supply Voltage

Figure 38

Quiescent Current vs Temperature

Figure 39

Channel Separation vs Frequency

Figure 40

EMIRR vs Frequency

Figure 41

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