PCM5142A datasheet(76/123 Pages) TI2

76 / 123 page

PCM5141, PCM5142

SLAS759B – AUGUST 2012 – REVISED JANUARY 2016

www.ti.com

RQMR

Mute Right Channel

This bit issues soft mute request for the right channel. The volume will be smoothly ramped down/up to avoid

pop/click noise.

Default value: 0

0: Normal volume

1: Mute

Table 58. Page 0 / Register 4

Dec

Hex

RSV

PLCK

RSV

PLLE

Reset Value

RSV

Reserved

Reserved. Do not access.

PLCK

PLL Lock Flag (Read Only)

This bit indicates whether the PLL is locked or not. When the PLL is disabled this bit always shows that the

PLL is not locked.

0: The PLL is locked

1: The PLL is not locked

PLLE

PLL Enable

This bit enables or disables the internal PLL. When PLL is disabled, the master clock will be switched to the

SCK.

Default value: 1

0: Disable PLL

1: Enable PLL

Table 59. Page 0 / Register 6

Dec

Hex

RSV

FSMI1

FSMI0

Reset Value

RSV

Reserved

Reserved. Do not access.

FSMI[1:0]

SPI MISO function sel

These bits select the function of the SPI_MISO pin when in SPI mode. If the pin is set as GPIO, register

readout via SPI is not possible.

Default value: 00

00: SPI_MISO

01: GPIO1

Others: Reserved (Do not set)

Table 60. Page 0 / Register 7

Dec

Hex

RSV

DEMP

RSV

SDSL

Reset Value

RSV

Reserved

Reserved. Do not access.

DEMP

De-Emphasis Enable

This bit enables or disables the de-emphasis filter. The default coefficients are for 44.1kHz sampling rate, but

can be changed by reprogramming the appropriate coeffients in RAM.

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Product Folder Links: PCM5141 PCM5142

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