7 Detailed Description

7.1 Overview

The TLVM13630 is an easy-to-use, synchronous buck, DC-DC power module that operates from a 3-V to 36-V

supply voltage. The device is intended for step-down conversions from 5-V, 12-V, and 24-V supply rails. With an

integrated power controller, inductor, and MOSFETs, the TLVM13630 delivers up to 3-A DC load current, with

high efficiency and ultra-low input quiescent current, in a very small solution size. Although designed for simple

implementation, this device offers flexibility to optimize its usage according to the target application. Control-loop

compensation is not required, reducing design time and external component count.

With a programmable switching frequency from 200 kHz to 2.2 MHz using its RT pin, the TLVM13630

incorporates specific features to improve EMI performance in noise-sensitive applications:

• An optimized package and pinout design enables a shielded switch-node layout that mitigates radiated EMI

• Parallel input and output paths with symmetrical capacitor layouts minimize parasitic inductance, switch-

voltage ringing, and radiated field coupling

• Clock synchronization and FPWM mode enable constant switching frequency across the load current range

• Integrated power MOSFETs with enhanced gate drive control enable low-noise PWM switching

• Adjustable switch-node slew rate, which allows optimization of EMI at higher frequency harmonics

The TLVM13630 module also includes inherent protection features for robust system requirements:

• An open-drain PGOOD indicator for power-rail sequencing and fault reporting

• Precision enable input with hysteresis, providing

– Programmable line undervoltage lockout (UVLO)

– Remote ON/OFF capability

• Internally fixed output-voltage soft start with monotonic startup into prebiased loads

• Hiccup-mode overcurrent protection with cycle-by-cycle peak and valley current limits

• Thermal shutdown with automatic recovery.

These features enable a flexible and easy-to-use platform for a wide range of applications. The pin arrangement

is designed for simple layout, requiring few external components. See Section 10 for layout example.

7.2 Functional Block Diagram

COUT

CIN

PG

PGND

VCC

VOUT

AGND

FB

EN

PGOOD

logic

+

VREF

Comp

Power

stage

and

control

logic

Shutdown

logic

OCP

UVLO

Oscillator

Soft start

LDO bias

subregulator

Enable

logic

2.2 µH

SW

VIN

RT

VLDOIN

OTP

EN

OTP

OCP

UVLO

IOUT(max) = 3 A

VIN = 3 V to 36 V

Optional

external bias

(from VOUT)

VOUT = 1 V to 6 V

PGOOD

indicator

RENT

RENB

Precision

enable for

VIN UVLO

RRT

RFBB

RFBT

To VOUT

sense point

VIN

CVCC

TLVM13630

SLVSFT6B – MAY 2021 – REVISED JANUARY 2022

www.ti.com

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