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TMDS442 Datasheet(PDF) 8 Page - Texas Instruments |
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TMDS442 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 47 page ![]() www.ti.com ELECTRICAL CHARACTERISTICS TMDS442 SLLS757A – AUGUST 2006 – REVISED MARCH 2007 RECOMMENDED OPERATING CONDITIONS (continued) MIN NOM MAX UNIT VIL LVTTL Low-level input voltage GND 0.8 V CONTROL PINS (OVS) VIH LVTTL High-level input voltage 3 3.6 V VIL LVTTL Low-level input voltage -0.5 0.5 V STATUS PINS (HPD_SINK, 5V_PWR) VIH High-level input voltage 2 5.3 V VIL Low-level input voltage GND 0.8 V DDC I/O PINS (SCL_SINK, SDA_SINK) VIH High-level input voltage 0.7VCC 5.5 V VIL Low-level input voltage -0.5 0.3VCC V VILC Low-level input voltage contention(1) -0.5 0.4 V DDC I/O PINS (SCL, SDA) VIH High-level input voltage 2.1 5.5 V VIL Low-level input voltage -0.5 1.5 V LOCAL I2C PINS (LC_SCL, LC_SDA) VIH High-level input voltage 0.7VCC VCC V VIL Low-level input voltage -0.5 0.3VCC V (1) VIL specification is for the first low level seen by the SCL_SINK/SDA_SINK lines. VILC is for the second and subsequent low levels seen by the SCL_SINK/SDA_SINK lines. over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VIH = VCC, VIL = VCC – 0.4 V, RT = 50 Ω, AVCC = 3.3 V, ICC Supply current 250 412(2) mA Ai/Bi(2:4) = 1.65-Gbps HDMI data pattern, Ai/Bi(1) = 165-MHz Pixel clock VIH = VCC, VIL = VCC – 0.4 V, RT = 50 Ω, AVCC = 3.3 V, PD Power dissipation 640 1344(2) mW Ai/Bi(2:4) = 1.65-Gbps HDMI data pattern, Ai/Bi(1) = 165-MHz Pixel clock TMDS DIFFERENTIAL PINS (A/B, Y/Z) VOH Single-ended high-level output voltage AVCC–10 AVCC+10 mV VOL Single-ended low-level output voltage AVCC–600 AVCC–400 mV Vswing Single-ended output swing voltage 400 600 mV See Figure 4, AVCC = 3.3 V, VOD(O) Overshoot of output differential voltage 15% 2 × V swing RT = 50 Ω VOD(U) Undershoot of output differential voltage 25% 2 × V swing Change in steady-state common-mode ΔVOC(SS) 5 mV output voltage between logic states 0 V ≤ VCC ≤ 1.5 V, I(O)OFF Single-ended standby output current –10 10 µA AVCC = 3.3 V, RT = 50 Ω VOD(pp) Peak-to-peak output differential voltage 800 1200 See Figure 5, PRE = High, mVp-p Steady state output differential voltage AVCC = 3.3 V, RT = 50 Ω VODE(SS) 560 840 with de-emphasis PRE = Low -12 12 I(OS) Short circuit output current See Figure 6 mA PRE = High -15 15 Single-ended input voltage under high VI(open) II = 10 µA VCC–10 VCC+10 mV impedance input or open input RINT Input termination resistance VIN = 2.9 V 45 50 55 Ω STATUS PINS (HPD_SINK, 5V_PWR) (1) All typical values are at 25 °C and with a 3.3-V supply. (2) The maximum rating is characterized under 3.6 V VCC. 8 Submit Documentation Feedback Copyright © 2006–2007, Texas Instruments Incorporated Product Folder Link(s): TMDS442 |
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