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TMDS442 Datasheet(PDF) 11 Page - Texas Instruments |
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TMDS442 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 47 page ![]() www.ti.com TIMING CHARACTERISTICS FOR LOCAL I 2C INTERFACE (LC_SCL, LC_SDA, LC_AO, LC_A1) TMDS442 SLLS757A – AUGUST 2006 – REVISED MARCH 2007 STANDARD MODE FAST MODE PARAMETER UNIT MIN MAX MIN MAX fSCL Clock frequency, SCL 100 400 kHz tw(L) Clock low period, SCL low 4.7 1.3 μs tw(H) Clock high period, SCL high 4 0.6 μs tr Rise time, SCL and SDA 1000 300 μs tf Fall time, SCL and SDA 300 300 μs tsu(1) Setup time, SDA to SCL 250 100 μs th(1) Hold time, SCL to SDA 0 0 μs t(buf) BUS Free time between a STOP and START condition 4.7 1.3 μs tsu(2) Setup time, SCL to start condition 4.7 0.6 μs th(2) Hold time, start condition to SCL 4 0.6 μs tsu(3) Setup time, SCL to stop condition 4 0.6 μs Cb (1) Capacitive load for each bus line 400 400 pF (1) Cb is the total capacitance of one bus line in pF. Copyright © 2006–2007, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TMDS442 |
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