TMP112 datasheet(27/46 Pages) TI2

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7.5.3.8 Alert (AL)

The AL bit is a read-only function. Reading the AL bit provides information about the comparator mode status.

The state of the POL bit inverts the polarity of data returned from the AL bit. When the POL bit equals 0, the AL

bit reads as 1 until the temperature equals or exceeds T(HIGH) for the programmed number of consecutive faults,

causing the AL bit to read as 0. The AL bit continues to read as 0 until the temperature falls below T(LOW) for

the programmed number of consecutive faults, when the bit again reads as 1. The status of the TM bit does not

affect the status of the AL bit.

7.5.3.9 Conversion Rate (CR)

The conversion rate bits, CR1 and CR0, configure the TMP112-Q1/TMP112D-Q1 device for conversion rates

of 0.25Hz, 1Hz, 4Hz, or 8Hz. The default rate is 4Hz. For more information on conversion rate bits, see the

Continuous-Conversion Mode section.

7.5.4 High- and Low-Limit Registers

The temperature limits are stored in the T(LOW) and T(HIGH) registers in the same format as the temperature

result, and the values are compared to the temperature result on every conversion. The outcome of the

comparison drives the behavior of the ALERT pin, which operates as a comparator output or an interrupt, and is

set by the TM bit in the configuration register.

In Comparator mode (TM = 0), the ALERT pin becomes active when the temperature equals or exceeds the

value in the T(HIGH) register and generates a consecutive number of faults according to fault bits F1 and F0. The

ALERT pin remains active until the temperature falls below the indicated T(LOW) value for the same number of

faults.

In interrupt mode (TM = 1), the ALERT pin becomes active when the temperature equals or exceeds the value

in T(HIGH) for a consecutive number of fault conditions (as shown in Table 7-10). The ALERT pin remains active

until a read operation of any register occurs, or the device successfully responds to the SMBus alert response

address. The ALERT pin is also cleared if the device is placed in shutdown mode. When the ALERT pin

is cleared, the pin becomes active again only when temperature falls below T(LOW), and remains active until

cleared by a read operation of any register or a successful response to the SMBus alert response address.

When the ALERT pin is cleared, the above cycle repeats, with the ALERT pin becoming active when the

temperature equals or exceeds T(HIGH). The ALERT pin can also be cleared by resetting the device with the

general-call Reset command. This action also clears the state of the internal registers in the device, returning the

device to comparator mode (TM = 0).

Both operating modes are represented in Figure 7-9 and Figure 7-10. Table 7-11 and Table 7-12 list the format

for the T(HIGH) and T(LOW) registers. The most significant byte is sent first, followed by the least significant byte.

The power-up reset values for T(HIGH) and T(LOW) are:

• T(HIGH) = 80°C

• T(LOW) = 75°C

The format of the data for T(HIGH) and T(LOW) is the same as for the temperature register.

Table 7-11. Bytes 1 and 2 of T(HIGH) Register (1)

BYTE

H11

H10

(H12)

(H11)

(H10)

(H9)

(H8)

(H7)

(H6)

(H5)

(H4)

(H3)

(H2)

(H1)

(H0)

(0)

(1)

Extended mode 13-bit configuration shown in parenthesis.

Table 7-12. Bytes 1 and 2 of T(LOW) Register (1)

BYTE

L11

L10

(L12)

(L11)

(L10)

(L9)

(L8)

(L7)

(L6)

(L5)

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TMP112-Q1, TMP112D-Q1

SLOS887G – SEPTEMBER 2014 – REVISED MAY 2025

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