TMUX7208 datasheet(36/51 Pages) TI2

36 / 51 page

WORST

BETTER

BEST

1W min.

Figure 9-4. Trace Example

Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance

changes. When a via must be used, increase the clearance size around it to minimize its capacitance.

Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up

interference from the other layers of the board. Be careful when designing test points, through-hole pins are not

recommended at high frequencies.

Figure 9-5 and Figure 9-6 illustrate an example of a PCB layout with the TMUX7208. Some key considerations

are:

• Decouple the supply pins with a 0.1 µF and 1 µF capacitor, placed lowest value capacitor as close to the pin

as possible. Make sure that the capacitor voltage rating is sufficient for the supply voltage.

• Keep the input lines as short as possible.

• Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.

• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

• Using multiple vias in parallel will lower the overall inductance and is beneficial for connection to ground

planes.

TMUX7208, TMUX7209

SCDS418F – JULY 2020 – REVISED JULY 2024

www.ti.com

Submit Document Feedback

Product Folder Links: TMUX7208 TMUX7209

TMUX7208 Datasheet(PDF) 36 Page - Texas Instruments