DLPC6422 datasheet(26/46 Pages) TI2

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6 Detailed Description

6.1 Overview

As with prior DLP electronics solutions, image data is 100% digital from the DLPC6422 input port to the image

projected onto the display screen. The image stays in digital form and is never converted into an analog signal.

The DLPC6422 processes the digital input image and converts the data into bit-plane format as needed by the

DMD. The DLPC6422 light controller is optimized for high-resolution, high UV and visible light throughout the

digital imaging system. Applications include 3D printing, laser marking, laser manufacturing, and other digital

imaging and light exposure systems.

6.2 Functional Block Diagram

6.3 Feature Description

6.3.1 System Reset Operation

6.3.1.1 Power-Up Reset Operation

Immediately following a power-up event, the DLPC6422 hardware automatically brings up the primary PLL and

places the controller in normal power mode. Then, the hardware follows the standard system reset procedure

(see Section 6.3.1.2).

6.3.1.2 System Reset Operation

Immediately following any type of system reset (power-up reset, PWRGOOD reset, watchdog timer timeout,

lamp-strike reset), the DLPC6422 device automatically returns to NORMAL power mode in the following state:

• All GPIOs are tristated.

• The primary PLL remains active (it is reset only after a power-up reset sequence), and most of the derived

clocks are active. However, only those resets associated with the ARM9 processor and its peripherals are

released (the ARM9 is responsible for releasing all other resets).

• ARM9-associated clocks default to the full clock rate. (Boot-up is at full speed.)

• All front-end clocks derived are disabled.

DLPC6422

DLPS308A – JUNE 2025 – REVISED OCTOBER 2025

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DLPC6422 Datasheet(PDF) 26 Page - Texas Instruments