DAC38RF80 datasheet(68/160 Pages) TI2

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output

OUTSUM

SAME

ADJ

(7)

In order to avoid overflow, rounding operation is performed after the addition to reduce the word size back

to 16-bits. Exact number of bits rounded depends on the number of channels added. Table 7-40 shows the

description of round after the summation.

Table 7-40. OUTSUM Scaling and Rounding

# OF CHANNELS ADDED

# OF BITS ROUNDED

0, Use bits[15:0] from the result

Use bits[16:1] from the result and bit[0] used for rounding

Use bits[17:2] from the result and bits[1:0] used for rounding

Use bits[18:3] from the result and bit[2:0] used for rounding

Use bits[19:4] from the result and bit[3:0] used for rounding

7.3.20 Output Delay

The signal following output summation can be delayed by 0-15 DACCLK cycles through field OUTPUT_DELAY

in register OUTSUM (7.5.20). The block takes 16 sample words (vec16) from both the A and B paths and shifts

the them to 32 sample long delay line.

7.3.21 Polarity Inversion

The signal following the output delay can be inverted by a 2’s complement conversion allowing the + and - DAC

outputs to be swapped by asserting field DAC_COMPLEMENT in register MULTIDUC_CFG1 (7.5.13).

7.3.22 Temperature Sensor

The DAC38RFxx incorporates a temperature sensor block which monitors the die temperature by measuring the

voltage across 2 transistors. The voltage is converted to an 8-bit digital word using a successive approximation

(SAR) analog to digital conversion process. The result is scaled, limited and formatted as a twos complement

value representing the temperature in degrees Celsius.

The sampling is controlled by the serial interface signals SDEN and SCLK. If the temperature sensor is enabled

by writing a 0 to field TSENSE_SLEEP in register SLEEP_CONFIG (7.5.70), a conversion takes place each time

the serial port is written or read. The data is only read and sent out by the digital block when the temperature

sensor is read in field TEMPDATA in register TEMP_PLLVOLT (7.5.7). The conversion uses the first eight clocks

of the serial clock as the capture and conversion clock, the data is valid on the falling eighth SCLK. The data

is then clocked out of the chip on the rising edge of the ninth SCLK. No other clocks to the chip are necessary

for the temperature sensor operation. As a result the temperature sensor is enabled even when the device is in

sleep mode.

In order for the process described above to operate properly, the serial port read from register TEMP_PLLVOLT

must be done with an SCLK period of at least 1 μs. If this is not satisfied the temperature sensor accuracy is

greatly reduced.

7.3.23 Alarm Monitoring

The DAC38RFxx includes a flexible set of alarm monitoring that can be used to alert of a possible malfunction

scenario. All the alarm events can be accessed either through the SIP registers and/or through the ALARM

output. Once an alarm is set, the corresponding alarm bit must be reset through the serial interface to allow

further testing. The set of alarms includes the following conditions:

• JESD alarms

– Fields ALM_LANEx_ERR in registers JESD_ALM_Lx (x = 0-7, 7.5.59 to 7.5.66):

• multiframe alignment_error. Occurs when multiframe alignment fails

• frame alignment error. Occurs when multiframe alignment fails

• link configuration error. Occurs when there is wrong link configuration

DAC38RF80, DAC38RF83, DAC38RF84

DAC38RF85, DAC38RF90, DAC38RF93

SLASEA3D – DECEMBER 2016 – REVISED DECEMBER 2023

www.ti.com

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