DM505 datasheet(206/295 Pages) TI2

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DM505

SPRS976E – NOVEMBER 2016 – REVISED MAY 2018

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Detailed Description

6.10.15 GPIO

The general-purpose interface combines four general-purpose input/output (GPIO) banks.

Each GPIO module provides 32 dedicated general-purpose pins with input and output capabilities; thus,

the general-purpose interface supports up to 126 pins.

These pins can be configured for the following applications:

•

Data input (capture)/output (drive)

•

Keyboard interface with a debounce cell

•

Interrupt generation in active mode upon the detection of external events. Detected events are

processed by two parallel independent interrupt-generation submodules to support biprocessor

operations.

•

Wake-up request generation in idle mode upon the detection of external events

For more information, see chapter General-Purpose Interface of the device TRM.

6.10.16 ePWM

An effective PWM peripheral must be able to generate complex pulse width waveforms with minimal CPU

overhead or intervention. It needs to be highly programmable and very flexible while being easy to

understand and use. The ePWM unit described here addresses these requirements by allocating all

needed timing and control resources on a per PWM channel basis. Cross coupling or sharing of resources

has been avoided; instead, the ePWM is built up from smaller single channel modules with separate

resources and that can operate together as required to form a system. This modular approach results in

an orthogonal architecture and provides a more transparent view of the peripheral structure, helping users

to understand its operation quickly.

Each ePWM module supports the following features:

•

Dedicated 16-bit time-base counter with period and frequency control

•

Two PWM outputs (EPWM1A and EPWM2B) that can be used in the following configurations:

–

Two independent PWM outputs with single-edge operation

–

Two independent PWM outputs with dual-edge symmetric operation

–

One independent PWM output with dual-edge asymmetric operation

•

Asynchronous override control of PWM signals through software.

•

Hardware-locked (synchronized) phase relationship on a cycle-by-cycle basis.

•

Dead-band generation with independent rising and falling edge delay control.

•

Programmable trip zone allocation of both cycle-by-cycle trip and one-shot trip on fault conditions.

•

A trip condition can force either high, low, or high-impedance state logic levels at PWM outputs.

•

Programmable event prescaling minimizes CPU overhead on interrupts.

•

PWM chopping by high-frequency carrier signal, useful for pulse transformer gate drives.

For more information, see section Enhanced PWM (ePWM) Module in chapter Pulse-Width Modulation

Subsystem of the device TRM.

6.10.17 eCAP

Uses for eCAP include:

•

Sample rate measurements of audio inputs

•

Speed measurements of rotating machinery (for example, toothed sprockets sensed via Hall sensors)

•

Elapsed time measurements between position sensor pulses

•

Period and duty cycle measurements of pulse train signals

•

Decoding current or voltage amplitude derived from duty cycle encoded current/voltage sensors

The eCAP module includes the following features:

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