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DM505 Datasheet(PDF) 137 Page - Texas Instruments |
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DM505 Datasheet(HTML) 137 Page - Texas Instruments |
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137 / 295 page ![]() gpmc_fclk gpmc_clk gpmc_csi gpmc_a[ :1] 27 gpmc_ben0 gpmc_be 1 n gpmc_ _ale advn gpmc_wen gpmc_ d[15:0] a gpmc_waitj DIR Valid Address Data OUT OUT FA0 FA1 FA10 FA3 FA25 FA29 FA9 FA12 FA27 FA0 FA10 GPMC_10 137 DM505 www.ti.com SPRS976E – NOVEMBER 2016 – REVISED MAY 2018 Submit Documentation Feedback Specifications Copyright © 2016–2018, Texas Instruments Incorporated Figure 5-31. GPMC / NOR Flash - Asynchronous Write - Single Word Timing(1) (1) In “gpmc_csi”, i = 0 to 7. In “gpmc_waitj”, j = 0 to 1. (2) The "DIR" (direction control) output signal is NOT pinned out on any of the device pads. It is an internal signal only representing a signal direction on the GPMC data bus. |
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