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TDA2SA Datasheet(PDF) 167 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 167 Page - Texas Instruments |
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167 / 427 page ![]() 167 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Specifications Copyright © 2015–2019, Texas Instruments Incorporated 5.7.12 PCIEPHY DC Electrical Characteristics NOTE The PCIe interfaces are compliant with the electrical parameters specified in PCI Express® Base Specification Revision 3.0. 5.8 Thermal Resistance Characteristics For reliability and operability concerns, the maximum junction temperature of the Device has to be at or below the TJ value identified in Table 5-4, Recommended Operating Conditions. A BCI compact thermal model for this Device is available and recommended for use when modeling thermal performance in a system. Therefore, it is recommended to perform thermal simulations at the system level with the worst case device power consumption. 5.8.1 Package Thermal Characteristics Table 5-18 provides the thermal resistance characteristics for the package used on this device. NOTE Power dissipation of 1.5 W and an ambient temperature of 85ºC is assumed for ABC package. Table 5-18. Thermal Resistance Characteristics NO. PARAMET ER DESCRIPTION °C/W(1) AIR FLOW (m/s)(2) T1 RΘJC Junction-to-case 0.82 N/A T2 RΘJB Junction-to-board 3.78 N/A T3 RΘJA Junction-to-free air 11.1 0 T4 Junction-to-moving air 8.8 1 T5 8.0 2 T6 7.5 3 T7 ΨJT Junction-to-package top 0.62 0 T8 0.66 1 T9 0.66 2 T10 0.66 3 T11 ΨJB Junction-to-board 3.43 0 T12 3.22 1 T13 3.12 2 T14 3.04 3 (1) These values are based on a JEDEC defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a JEDEC defined 1S0P system) and will change based on environment as well as application. For more information, see these EIA/JEDEC standards: – JESD51-2, Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air) – JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages – JESD51-6, Integrated Circuit Thermal Test Method Environmental Conditions - Forced Convection (Moving Air) – JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages – JESD51-9, Test Boards for Area Array Surface Mount Packages (2) m/s = meters per second 5.9 Power Supply Sequences |
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