Electronic Components Datasheet Search
  English  ▼

X  

TDA2SA Datasheet(PDF) 299 Page - Texas Instruments

Part # TDA2SA
Description  TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0
PDF  427 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TDA2SA Datasheet(HTML) 299 Page - Texas Instruments

Back Button TDA2SA Datasheet HTML 295Page - Texas Instruments TDA2SA Datasheet HTML 296Page - Texas Instruments TDA2SA Datasheet HTML 297Page - Texas Instruments TDA2SA Datasheet HTML 298Page - Texas Instruments TDA2SA Datasheet HTML 299Page - Texas Instruments TDA2SA Datasheet HTML 300Page - Texas Instruments TDA2SA Datasheet HTML 301Page - Texas Instruments TDA2SA Datasheet HTML 302Page - Texas Instruments TDA2SA Datasheet HTML 303Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 299 / 427 page
background image
DSSD2
DSSD1
DSSD0
DSSD3
DSSD4
mmcx_clk
mmcx_cmd
mmcx_dat[3:0]
MMC1_02
DSSD2
DSSD1
DSSD0
DSSD6
DSSD5
DSSD8
DSSD7
mmc1_clk
mmc1_cmd
mmc1_dat[3:0]
MMC1_01
299
TDA2SX, TDA2SG, TDA2SA
TDA2HG, TDA2HV, TDA2HF, TDA2LF
www.ti.com
SPRS951F – DECEMBER 2015 – REVISED MAY 2019
Submit Documentation Feedback
Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF
Timing Requirements and Switching Characteristics
Copyright © 2015–2019, Texas Instruments Incorporated
Table 7-89. Timing Requirements for MMC1 - SD Card Default Speed Mode
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
DSSD5
tsu(cmdV-clkH)
Setup time, mmc1_cmd valid before mmc1_clk rising clock edge
5.11
ns
DSSD6
th(clkH-cmdV)
Hold time, mmc1_cmd valid after mmc1_clk rising clock edge
20.46
ns
DSSD7
tsu(dV-clkH)
Setup time, mmc1_dat[3:0] valid before mmc1_clk rising clock edge
5.11
ns
DSSD8
th(clkH-dV)
Hold time, mmc1_dat[3:0] valid after mmc1_clk rising clock edge
20.46
ns
Table 7-90. Switching Characteristics for MMC1 - SD Card Default Speed Mode
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
DSSD0
fop(clk)
Operating frequency, mmc1_clk
24
MHz
DSSD1
tw(clkH)
Pulse duration, mmc1_clk high
0.5*P-
0.185(1)
ns
DSSD2
tw(clkL)
Pulse duration, mmc1_clk low
0.5*P-
0.185 (1)
ns
DSSD3
td(clkL-cmdV)
Delay time, mmc1_clk falling clock edge to mmc1_cmd transition
-14.93
14.93
ns
DSSD4
td(clkL-dV)
Delay time, mmc1_clk falling clock edge to mmc1_dat[3:0] transition
-14.93
14.93
ns
(1) P = output mmc1_clk period in ns
Figure 7-54. MMC/SD/SDIO in - Default Speed - Receiver Mode
Figure 7-55. MMC/SD/SDIO in - Default Speed - Transmitter Mode
7.22.1.2 High speed, 4-bit data, SDR, half-cycle
Table 7-91 and Table 7-92 present Timing requirements and Switching characteristics for MMC1 - High
Speed in receiver and transmitter mode (see Figure 7-56 and Figure 7-57)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com