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TDA2SA Datasheet(PDF) 297 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 297 Page - Texas Instruments |
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297 / 427 page  297 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-86. GMAC RGMII IOSETs (continued) SIGNALS IOSET3 IOSET4 BALL MUX BALL MUX rgmii1_rxd0 A4 3 rgmii1_rxctl A3 3 rgmii1_txc D5 3 rgmii1_txctl C2 3 rgmii1_rxc C5 3 GMAC RGMII0 rgmii0_txd3 V7 0 rgmii0_txd2 U7 0 rgmii0_txd1 V6 0 rgmii0_txd0 U6 0 rgmii0_rxd3 V4 0 rgmii0_rxd2 V3 0 rgmii0_rxd1 Y2 0 rgmii0_rxd0 W2 0 rgmii0_txc W9 0 rgmii0_rxctl V5 0 rgmii0_rxc U5 0 rgmii0_txctl V9 0 NOTE To configure the desired Manual IO Timing Mode the user must follow the steps described in section "Manual IO Timing Modes" of the Device TRM. The associated registers to configure are listed in the CFG REGISTER column. For more information please see the Control Module Chapter in the Device TRM. Manual IO Timings Modes must be used to ensure some IO timings for GMAC. See Table 7-2 Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 7-87 Manual Functions Mapping for GMAC RGMII0 for a definition of the Manual modes. Table 7-87 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers. Table 7-87. Manual Functions Mapping for GMAC RGMII0 BALL BALL NAME GMAC_RGMII0_MANUAL1 CFG REGISTER MUXMODE A_DELAY (ps) G_DELAY (ps) 0 U5 rgmii0_rxc 260 0 CFG_RGMII0_RXC_IN rgmii0_rxc V5 rgmii0_rxctl 0 1412 CFG_RGMII0_RXCTL_IN rgmii0_rxctl W2 rgmii0_rxd0 123 1047 CFG_RGMII0_RXD0_IN rgmii0_rxd0 Y2 rgmii0_rxd1 139 1081 CFG_RGMII0_RXD1_IN rgmii0_rxd1 V3 rgmii0_rxd2 195 1100 CFG_RGMII0_RXD2_IN rgmii0_rxd2 V4 rgmii0_rxd3 239 1216 CFG_RGMII0_RXD3_IN rgmii0_rxd3 W9 rgmii0_txc 89 0 CFG_RGMII0_TXC_OUT rgmii0_txc V9 rgmii0_txctl 15 125 CFG_RGMII0_TXCTL_OUT rgmii0_txctl U6 rgmii0_txd0 339 162 CFG_RGMII0_TXD0_OUT rgmii0_txd0 V6 rgmii0_txd1 146 94 CFG_RGMII0_TXD1_OUT rgmii0_txd1 U7 rgmii0_txd2 0 27 CFG_RGMII0_TXD2_OUT rgmii0_txd2 V7 rgmii0_txd3 291 205 CFG_RGMII0_TXD3_OUT rgmii0_txd3 |
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