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TDA2SA Datasheet(PDF) 300 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 300 Page - Texas Instruments |
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300 / 427 page ![]() mmc1_clk mmc1_cmd mmc1_dat[3:0] HSSD1 HSSD2L HSSD2H HSSD5 HSSD6 HSSD5 HSSD6 MMC1_04 mmc1_clk mmc1_cmd mmc1_dat[3:0] HSSD1 HSSD2L HSSD2H HSSD3 HSSD4 HSSD7 HSSD8 MMC1_03 300 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-91. Timing Requirements for MMC1 - SD Card High Speed Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT HSSD3 tsu(cmdV-clkH) Setup time, mmc1_cmd valid before mmc1_clk rising clock edge 5.3 ns HSSD4 th(clkH-cmdV) Hold time, mmc1_cmd valid after mmc1_clk rising clock edge 2.6 ns HSSD7 tsu(dV-clkH) Setup time, mmc1_dat[3:0] valid before mmc1_clk rising clock edge 5.3 ns HSSD8 th(clkH-dV) Hold time, mmc1_dat[3:0] valid after mmc1_clk rising clock edge 2.6 ns Table 7-92. Switching Characteristics for MMC1 - SD Card High Speed Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT HSSD1 fop(clk) Operating frequency, mmc1_clk 48 MHz HSSD2H tw(clkH) Pulse duration, mmc1_clk high 0.5*P- 0.185 (1) ns HSSD2L tw(clkL) Pulse duration, mmc1_clk low 0.5*P- 0.185 (1) ns HSSD5 td(clkL-cmdV) Delay time, mmc1_clk falling clock edge to mmc1_cmd transition -7.6 3.6 ns HSSD6 td(clkL-dV) Delay time, mmc1_clk falling clock edge to mmc1_dat[3:0] transition -7.6 3.6 ns (1) P = output mmc1_clk period in ns Figure 7-56. MMC/SD/SDIO in - High Speed - Receiver Mode Figure 7-57. MMC/SD/SDIO in - High Speed - Transmitter Mode 7.22.1.3 SDR12, 4-bit data, half-cycle Table 7-93 and Table 7-94 present Timing requirements and Switching characteristics for MMC1 - SDR12 in receiver and transmitter mode(see Figure 7-58 and Figure 7-59). Table 7-93. Timing Requirements for MMC1 - SD Card SDR12 Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT SDR12 5 tsu(cmdV-clkH) Setup time, mmc1_cmd valid before mmc1_clk rising clock edge 25.99 ns |
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