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TDA2SA Datasheet(PDF) 319 Page - Texas Instruments

Part # TDA2SA
Description  TDA2x ADAS Applications Processor 23mm Package (ABC Package) Silicon Revision 2.0
PDF  427 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TDA2SA Datasheet(HTML) 319 Page - Texas Instruments

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mmcj_clk
mmcj_cmd
mmcj_dat[3:0]
HS1
HS2L
HS2H
HS5
HS6
HS5
HS6
MMC3/4_10
319
TDA2SX, TDA2SG, TDA2SA
TDA2HG, TDA2HV, TDA2HF, TDA2LF
www.ti.com
SPRS951F – DECEMBER 2015 – REVISED MAY 2019
Submit Documentation Feedback
Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF
Timing Requirements and Switching Characteristics
Copyright © 2015–2019, Texas Instruments Incorporated
Figure 7-78. MMC/SD/SDIOj in - High Speed - Transmitter Mode
7.22.3.3 MMC3 and MMC4, SD and SDIO SDR12 Mode
Figure 7-79, Figure 7-80, and Table 7-122, through Table 7-125 present Timing requirements and
Switching characteristics for MMC3 and MMC4 - SD and SDIO SDR12 in receiver and transmitter mode.
Table 7-122. Timing Requirements for MMC3 - SDR12 Mode (1)
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR125
tsu(cmdV-clkH)
Setup time, mmc3_cmd valid before mmc3_clk rising clock edge
25.99
ns
SDR126
th(clkH-cmdV)
Hold time, mmc3_cmd valid after mmc3_clk rising clock edge
1.6
ns
SDR127
tsu(dV-clkH)
Setup time, mmc3_dat[i:0] valid before mmc3_clk rising clock edge
25.99
ns
SDR128
th(clkH-dV)
Hold time, mmc3_dat[i:0] valid after mmc3_clk rising clock edge
1.6
ns
(1) i in [i:0] = 7
Table 7-123. Switching Characteristics for MMC3 - SDR12 Mode (2)
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR120
fop(clk)
Operating frequency, mmc3_clk
24
MHz
SDR121
tw(clkH)
Pulse duration, mmc3_clk high
0.5*P-
0.270 (1)
ns
SDR122
tw(clkL)
Pulse duration, mmc3_clk low
0.5*P-
0.270 (1)
ns
SDR123
td(clkL-cmdV)
Delay time, mmc3_clk falling clock edge to mmc3_cmd transition
-19.13
16.93
ns
SDR124
td(clkL-dV)
Delay time, mmc3_clk falling clock edge to mmc3_dat[i:0] transition
-19.13
16.93
ns
(1) P = output mmc3_clk period in ns
(2) i in [i:0] = 7
Table 7-124. Timing Requirements for MMC4 - SDR12 Mode (1)
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR125
tsu(cmdV-clkH)
Setup time, mmc4_cmd valid before mmc4_clk rising clock edge
25.99
ns
SDR126
th(clkH-cmdV)
Hold time, mmc4_cmd valid after mmc4_clk rising clock edge
1.6
ns
SDR127
tsu(dV-clkH)
Setup time, mmc4_dat[i:0] valid before mmc4_clk rising clock edge
25.99
ns
SDR128
th(clkH-dV)
Hold time, mmc4_dat[i:0] valid after mmc4_clk rising clock edge
1.6
ns
(1) j in [i:0] = 3
Table 7-125. Switching Characteristics for MMC4 - SDR12 Mode (2)
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
SDR120
fop(clk)
Operating frequency, mmc4_clk
24
MHz
SDR121
tw(clkH)
Pulse duration, mmc4_clk high
0.5*P-
0.270 (1)
ns
SDR122
tw(clkL)
Pulse duration, mmc4_clk low
0.5*P-
0.270 (1)
ns



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