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TDA2SA Datasheet(PDF) 321 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 321 Page - Texas Instruments |
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321 / 427 page  mmcj_clk mmcj_cmd mmcj_dat[3:0] SDR254 SDR258 SDR253 SDR257 SDR251 SDR252H SDR252L MMC3/4_13 321 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-127. Switching Characteristics for MMC3 - SDR25 Mode (2) (continued) NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR252 H tw(clkH) Pulse duration, mmc3_clk high 0.5*P- 0.270 (1) ns SDR252L tw(clkL) Pulse duration, mmc3_clk low 0.5*P- 0.270 (1) ns SDR255 td(clkL-cmdV) Delay time, mmc3_clk falling clock edge to mmc3_cmd transition -8.8 6.6 ns SDR256 td(clkL-dV) Delay time, mmc3_clk falling clock edge to mmc3_dat[i:0] transition -8.8 6.6 ns (1) P = output mmc3_clk period in ns (2) i in [i:0] = 7 Table 7-128. Timing Requirements for MMC4 - SDR25 Mode (1) NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR255 tsu(cmdV-clkH) Setup time, mmc4_cmd valid before mmc4_clk rising clock edge 5.3 ns SDR256 th(clkH-cmdV) Hold time, mmc4_cmd valid after mmc4_clk rising clock edge 1.6 ns SDR257 tsu(dV-clkH) Setup time, mmc4_dat[i:0] valid before mmc4_clk rising clock edge 5.3 ns SDR258 th(clkH-dV) Hold time, mmc4_dat[i:0] valid after mmc4_clk rising clock edge 1.6 ns (1) i in [i:0] = 3 Table 7-129. Switching Characteristics for MMC4 - SDR25 Mode (2) NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR251 fop(clk) Operating frequency, mmc4_clk 48 MHz SDR252 H tw(clkH) Pulse duration, mmc4_clk high 0.5*P- 0.270 (1) ns SDR252L tw(clkL) Pulse duration, mmc4_clk low 0.5*P- 0.270 (1) ns SDR255 td(clkL-cmdV) Delay time, mmc4_clk falling clock edge to mmc4_cmd transition -8.8 6.6 ns SDR256 td(clkL-dV) Delay time, mmc4_clk falling clock edge to mmc4_dat[i:0] transition -8.8 6.6 ns (1) P = output mmc4_clk period in ns (2) i in [i:0] = 3 Figure 7-81. MMC/SD/SDIOj in - SDR25 - Receiver Mode |
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