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TDA2SA Datasheet(PDF) 320 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 320 Page - Texas Instruments |
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320 / 427 page  SDR122 SDR121 SDR120 SDR123 SDR124 mmcj_clk mmcj_cmd mmcj_dat[3:0] MMC3/4_12 SDR122 SDR121 SDR120 SDR126 SDR125 SDR128 SDR127 mmcj_clk mmcj_cmd mmcj_dat[3:0] MMC3/4_11 320 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-125. Switching Characteristics for MMC4 - SDR12 Mode (2) (continued) NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR125 td(clkL-cmdV) Delay time, mmc4_clk falling clock edge to mmc4_cmd transition -19.13 16.93 ns SDR126 td(clkL-dV) Delay time, mmc4_clk falling clock edge to mmc4_dat[i:0] transition -19.13 16.93 ns (1) P = output mmc4_clk period in ns (2) j in [i:0] = 3 Figure 7-79. MMC/SD/SDIOj in - SDR12 - Receiver Mode Figure 7-80. MMC/SD/SDIOj in - SDR12 - Transmitter Mode 7.22.3.4 MMC3 and MMC4, SD SDR25 Mode Figure 7-81, Figure 7-82, and Table 7-126 through Table 7-129 present Timing requirements and Switching characteristics for MMC3 and MMC4 - SD and SDIO SDR25 in receiver and transmitter mode. Table 7-126. Timing Requirements for MMC3 - SDR25 Mode (1) NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR253 tsu(cmdV-clkH) Setup time, mmc3_cmd valid before mmc3_clk rising clock edge 5.3 ns SDR254 th(clkH-cmdV) Hold time, mmc3_cmd valid after mmc3_clk rising clock edge 1.6 ns SDR257 tsu(dV-clkH) Setup time, mmc3_dat[i:0] valid before mmc3_clk rising clock edge 5.3 ns SDR258 th(clkH-dV) Hold time, mmc3_dat[i:0] valid after mmc3_clk rising clock edge 1.6 ns (1) i in [i:0] = 7 Table 7-127. Switching Characteristics for MMC3 - SDR25 Mode (2) NO. PARAMETER DESCRIPTION MIN MAX UNIT SDR251 fop(clk) Operating frequency, mmc3_clk 48 MHz |
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