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TDA2SA Datasheet(PDF) 113 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 113 Page - Texas Instruments |
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113 / 427 page  113 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Terminal Configuration and Functions Copyright © 2015–2019, Texas Instruments Incorporated Table 4-12. SPI Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL spi4_cs0 SPI4 Chip Select IO P9/ F3/ AA4/ U6/ AB5 spi4_cs1 SPI4 Chip Select IO P4/ Y1 spi4_cs2 SPI4 Chip Select IO R3/ W9 spi4_cs3 SPI4 Chip Select IO T2/ V9 (1) This clock signal is implemented as 'pad loopback' inside the device - the output signal is looped back through the input buffer to serve as the internal reference signal. Series termination is recommended (as close to device pin as possible) to improve signal integrity of the clock input. Any nonmonotonicity in voltage that occurs at the pad loopback clock pin between VIH and VIL must be less than VHYS. 4.4.10 Quad Serial Peripheral Interface (QSPI) NOTE For more information see the Serial Communication Interface / Quad Serial Peripheral Interface section of the device TRM. Table 4-13. QSPI Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL qspi1_sclk QSPI1 Serial Clock IO R2 qspi1_rtclk QSPI1 Return Clock Input.Must be connected from QSPI1_SCLK on PCB. Refer to PCB Guidelines for QSPI1 I R3 qspi1_d0 QSPI1 Data[0]. This pin is output data for all commands/writes and for dual read and quad read modes it becomes input data pin during read phase. IO U1 qspi1_d1 QSPI1 Data[1]. Input read data in all modes. I P3 qspi1_d2 QSPI1 Data[2]. This pin is used only in quad read mode as input data pin during read phase I U2 qspi1_d3 QSPI1 Data[3]. This pin is used only in quad read mode as input data pin during read phase I T2 qspi1_cs0 QSPI1 Chip Select[0]. This pin is Used for QSPI1 boot modes. O P2 qspi1_cs1 QSPI1 Chip Select[1] O P1 qspi1_cs2 QSPI1 Chip Select[2] O T7 qspi1_cs3 QSPI1 Chip Select[3] O P6 4.4.11 Multichannel Audio Serial Port (McASP) NOTE For more information, see the Serial Communication Interface / Multichannel Audio Serial Port (McASP) section of the device TRM. Table 4-14. McASP Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL Multichannel Audio Serial Port 1 mcasp1_axr0 McASP1 Transmit/Receive Data IO G12 mcasp1_axr1 McASP1 Transmit/Receive Data IO F12 mcasp1_axr2 McASP1 Transmit/Receive Data IO G13 mcasp1_axr3 McASP1 Transmit/Receive Data IO J11 mcasp1_axr4 McASP1 Transmit/Receive Data IO D18/ E12 mcasp1_axr5 McASP1 Transmit/Receive Data IO E17 / F13 mcasp1_axr6 McASP1 Transmit/Receive Data IO B26 / C12 mcasp1_axr7 McASP1 Transmit/Receive Data IO C23 / D12 |
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