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TDA2SA Datasheet(PDF) 138 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 138 Page - Texas Instruments |
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138 / 427 page ![]() 138 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Specifications Copyright © 2015–2019, Texas Instruments Incorporated (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 5.3 Power on Hour (POH) Limits The information in the section below is provided solely for your convenience and does not extend or modify the warranty provided under TI’s standard terms and conditions for TI semiconductor products. NOTE POH is a functional of voltage, temperature and time. Usage at higher voltages and temperatures will result in a reduction in POH to achieve the same reliability performance. For assessment of alternate use cases, contact your local TI representative. Table 5-3. Power-On Hour (POH) Limits IP Duty Cycle Voltage Domain Voltage (V) (max) Frequency (MHz) (max) Tj(°C) POH All 100% All All Supported OPPs Automotive Profile(1) 20000 (1) Automotive profile is defined as 20000 power on hours with junction temperature as follows: 5%@-40°C, 65%@70°C, 20%@110°C, 10%@125°C. 5.4 Recommended Operating Conditions The device is used under the recommended operating conditions described in Table 5-4. NOTE Logic functions and parameter values are not assured out of the range specified in the recommended operating conditions. Table 5-4. Recommended Operating Conditions PARAMETER DESCRIPTION MIN (2) NOM MAX DC (3) MAX (2) UNIT Input Power Supply Voltage Range vdd Core voltage domain supply See Section 5.5 V vdd_mpu Supply voltage range for MPU domain See Section 5.5 V vdd_gpu GPU voltage domain supply See Section 5.5 V vdd_dspeve DSP-EVE voltage domain supply See Section 5.5 V vdd_iva IVA voltage domain supply See Section 5.5 V vdd_rtc RTC voltage domain supply See Section 5.5 V vdda_usb1 DPLL_USB and HS USB1 1.8V analog power supply 1.71 1.80 1.836 1.89 V Maximum noise (peak-peak) 50 mVPPmax vdda_usb2 HS USB2 1.8V analog power supply 1.71 1.80 1.836 1.89 V Maximum noise (peak-peak) 50 mVPPmax vdda33v_usb1 HS USB1 3.3V analog power supply.If USB1 is not used, this pin can alternatively be connected to VSS if the following requirements are met: - The usb1_dm/usb1_dp pins are left unconnected - The USB1 PHY is kept powered down 3.135 3.3 3.366 3.465 V Maximum noise (peak-peak) 50 mVPPmax |
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