TDA2SA datasheet(142/427 Pages) TI2

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142

TDA2SX, TDA2SG, TDA2SA

TDA2HG, TDA2HV, TDA2HF, TDA2LF

SPRS951F – DECEMBER 2015 – REVISED MAY 2019

www.ti.com

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Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF

Specifications

Table 5-4. Recommended Operating Conditions (continued)

PARAMETER

DESCRIPTION

MIN (2)

NOM

MAX DC (3)

MAX (2)

UNIT

(1)

Operating junction

temperature range

Automotive

-40

125(5)

°C

ddr1_vref0

Reference Power Supply DDR1

0.5*vdds_ddr1

ddr2_vref0

Reference Power Supply DDR2

0.5*vdds_ddr2

(1) Refer to Power on Hours table Table 5-3 for limitations.

(2) The voltage at the device ball should never be below the MIN voltage or above the MAX voltage for any amount of time. This

requirement includes dynamic voltage events such as AC ripple, voltage transients, voltage dips, etc.

(3) The DC voltage at the device ball should never be above the MAX DC voltage to avoid impact on device reliability and lifetime POH

(Power-On-Hours). The MAX DC voltage is defined as the highest allowed DC regulated voltage, without transients, seen at the ball.

(4) If DDR2 type of memories are used, the EMIF power supply (vdds_ddrx) and the corresponding bias power supply (vdds18v_ddrx) must

be sourced from single power source.

(5) The TSHUT feature of the SoC resets the device by default when one of the on-die temp sensors reports 123°C. This is intended to

protect the device from exceeding 125°C. Though not recommended, the TSHUT temperature threshold can be modified in software if

other mechanisms are in place to avoid exceeding 125°C. Refer to the device TRM for details on the TSHUT feature.

5.5

Operating Performance Points

This section describes the operating conditions of the device. This section also contains the description of

each OPP (operating performance point) for processor clocks and device core clocks.

Table 5-5 describes the maximum supported frequency per speed grade for the devices.

Table 5-5. Speed Grade Maximum Frequency

DEVICE SPEED

MAXIMUM FREQUENCY (MHz)

MPU

DSP

EVE

IVA

GPU

IPU

DDR3/

DDR3L

DDR2

TDA2xxD

500

430

500

212.8

266

532

(DDR3-

1066)

400

(DDR2-

800)

TDA2xxF

650

600

532

500

212.8

266

532

(DDR3-

1066)

400

(DDR2-

800)

TDA2xxR

750

650

532

500

212.8

266

532

(DDR3-

1066)

400

(DDR2-

800)

TDA2xxT

1176

750

650

532

212.8

266

532

(DDR3-

1066)

400

(DDR2-

800)

5.5.1

AVS and ABB Requirements

Adaptive Voltage Scaling (AVS) and Adaptive Body Biasing (ABB) are required on most of the vdd_*

supplies as defined in Table 5-6.

Table 5-6. AVS and ABB Requirements per vdd_* Supply

SUPPLY

AVS REQUIRED?

ABB REQUIRED?

vdd_core

Yes, for all OPPs

vdd_mpu

Yes, for all OPPs

vdd_iva

Yes, for all OPPs

vdd_dspeve

Yes, for all OPPs

vdd_gpu

Yes, for all OPPs

vdd_rtc

TDA2SA Datasheet(PDF) 142 Page - Texas Instruments

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