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TDA2SA Datasheet(PDF) 145 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 145 Page - Texas Instruments |
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145 / 427 page  145 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Specifications Copyright © 2015–2019, Texas Instruments Incorporated Table 5-9. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name DMA_CRYPTO DMA_CRYPTO_FC LK Int & Func 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE DMA_CRYPTO_IC LK Int 133 L4SEC_L4_GICLK CORE_X2_CLK DPLL_CORE DMM DMM_CLK Int 266 EMIF_L3_GICLK CORE_X2_CLK DPLL_CORE DPLL_DEBUG SYSCLK Int 38.4 EMU_SYS_CLK SYS_CLK1 OSC1 DSP1 DSP1_FICLK Int & Func DSP_CLK DSP1_GFCLK DSP_GFCLK DPLL_DSP DSP2 DSP2_FICLK Int & Func DSP_CLK DSP2_GFCLK DSP_GFCLK DPLL_DSP DSS DSS_HDMI_CEC_ CLK Func 0.032 HDMI_CEC_GFCLK SYS_CLK1/610 OSC1 DSS_HDMI_PHY_ CLK Func 48 HDMI_PHY_GFCLK FUNC_192M_CLK DPLL_PER DSS_CLK Func 192 DSS_GFCLK DSS_CLK DPLL_PER HDMI_CLKINP Func 38.4 HDMI_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DSS_L3_ICLK Int 266 DSS_L3_GICLK CORE_X2_CLK DPLL_CORE VIDEO1_CLKINP Func 38.4 VIDEO1_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 VIDEO2_CLKINP Func 38.4 VIDEO2_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DPLL_DSI1_A_CL K1 Func 209.3 N/A HDMI_CLK DPLL_HDMI VIDEO1_CLKOUT1 DPLL_VIDEO1 DPLL_DSI1_B_CL K1 Func 209.3 N/A VIDEO1_CLKOUT3 DPLL_VIDEO1 VIDEO2_CLKOUT3 DPLL_VIDEO2 HDMI_CLK DPLL_HDMI DPLL_ABE_X2_CL K DPLL_ABE DPLL_DSI1_C_CL K1 Func 209.3 N/A HDMI_CLK DPLL_HDMI VIDEO1_CLKOUT3 DPLL_VIDEO1 VIDEO2_CLKOUT1 DPLL_VIDEO2 DPLL_HDMI_CLK1 Func 185.6 N/A HDMI_CLK DPLL_HDMI |
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