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TDA2SA Datasheet(PDF) 146 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 146 Page - Texas Instruments |
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146 / 427 page  146 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Specifications Copyright © 2015–2019, Texas Instruments Incorporated Table 5-9. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name DSS DISPC LCD1_CLK Func 209.3 N/A DPLL_DSI1_A_CL K1 See DSS data in the rows above DSS_CLK LCD2_CLK Func 209.3 N/A DPLL_DSI1_B_CL K1 DSS_CLK LCD3_CLK Func 209.3 N/A DPLL_DSI1_C_CL K1 DSS_CLK F_CLK Func 209.3 N/A DPLL_DSI1_A_CL K1 DPLL_DSI1_B_CL K1 DPLL_DSI1_C_CL K1 DSS_CLK DPLL_HDMI_CLK1 EFUSE_CTRL_CU ST ocp_clk Int 133 CUSTEFUSE_L4_GICL K CORE_X2_CLK DPLL_CORE sys_clk Func 38.4 CUSTEFUSE_SYS_GF CLK SYS_CLK1 OSC1 ELM ELM_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE EMIF_OCP_FW L3_CLK Int 266 EMIF_L3_GICLK CORE_X2_CLK DPLL_CORE EMIF_PHY1 EMIF_PHY1_FCLK Func DDR EMIF_PHY_GCLK EMIF_PHY_GCLK DPLL_DDR EMIF_PHY2 EMIF_PHY2_FCLK Func DDR EMIF_PHY_GCLK EMIF_PHY_GCLK DPLL_DDR EMIF1 EMIF1_ICLK Int 266 EMIF_L3_GICLK CORE_X2_CLK DPLL_CORE EMIF2 EMIF2_ICLK Int 266 EMIF_L3_GICLK CORE_X2_CLK DPLL_CORE EVE1 EVE1_FCLK Func EVE_FCLK EVE1_GFCLK - DPLL_DSP EVE_GFCLK DPLL_EVE EVE2 EVE2_FCLK Func EVE_FCLK EVE2_GFCLK - DPLL_DSP EVE_GFCLK DPLL_EVE EVE3 EVE3_FCLK Func EVE_FCLK EVE3_GFCLK - DPLL_DSP EVE_GFCLK DPLL_EVE EVE4 EVE4_FCLK Func EVE_FCLK EVE4_GFCLK - DPLL_DSP EVE_GFCLK DPLL_EVE FPKA PKA_CLK Int & Func 266 L4SEC_L3_GICLK CORE_X2_CLK DPLL_CORE |
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