TDA2SA datasheet(143/427 Pages) TI2

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143

TDA2SX, TDA2SG, TDA2SA

TDA2HG, TDA2HV, TDA2HF, TDA2LF

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SPRS951F – DECEMBER 2015 – REVISED MAY 2019

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Specifications

5.5.2

Voltage And Core Clock Specifications

Table 5-7 shows the recommended OPP per voltage domain.

Table 5-7. Voltage Domains Operating Performance Points

DOMAIN

CONDITION

OPP_NOM

OPP_OD

OPP_HIGH

MIN (2)

NOM

(1)

MAX (2)

MIN (2)

NOM

(1)

MAX (2)

MIN (2)

NOM

(1)

MAX DC

(3)

MAX (2)

VD_CORE

(V)

BOOT (Before AVS

is enabled) (4)

1.11

1.15

1.2

Not Applicable

After AVS is

enabled (4)

AVS(5) –

3.5%

AVS(5)

1.2

Not Applicable

VD_MPU

(V)

BOOT (Before AVS

is enabled) (4)

1.11

1.15

1.2

Not Applicable

After AVS is

enabled (4)

AVS

Voltage(5)

– 3.5%

AVS

Voltag

e(5)

1.2

AVS

Voltage(5)

– 3.5%

AVS

Voltag

e(5)

AVS

Voltage(5)

+ 5%

AVS

Voltage(5)

– 3.5%

AVS

Voltag

e(5)

AVS

Voltage(5)

+2%

AVS

Voltage(5)

+ 5%

VD_RTC

(V) (6)

0.84

0.88

1.06

1.2

Not Applicable

Others (V)

BOOT (Before AVS

is enabled) (4)

1.02

1.06

1.2

Not Applicable

After AVS is

enabled (4)

AVS

Voltage(5)

– 3.5%

AVS

Voltag

e(5)

1.2

AVS

Voltage(5)

– 3.5%

AVS

Voltag

e(5)

AVS

Voltage(5)

+ 5%

AVS

Voltage(5)

– 3.5%

AVS

Voltag

e(5)

AVS

Voltage(5)

+2%

AVS

Voltage(5)

+ 5%

(1) In a typical implementation, the power supply should target the NOM voltage.

(2) The voltage at the device ball should never be below the MIN voltage or above the MAX voltage for any amount of time. This

requirement includes dynamic voltage events such as AC ripple, voltage transients, voltage dips, etc.

(3) The DC voltage at the device ball should never be above the MAX DC voltage to avoid impact on device reliability and lifetime POH

(Power-On-Hours). The MAX DC voltage is defined as the highest allowed DC regulated voltage, without transients, seen at the ball.

(4) For all OPPs, AVS must be enabled to avoid impact on device reliability, lifetime POH (Power-On-Hours), and device power.

(5) The AVS voltages are device-dependent, voltage domain-dependent, and OPP-dependent. They must be read from the

STD_FUSE_OPP. For information about STD_FUSE_OPP Registers address, please refer to Control Module Section of the TRM. The

power supply should be adjustable over the following ranges for each required OPP:

–

OPP_NOM for MPU: 0.85 V - 1.15 V

–

OPP_NOM for CORE and Others: 0.85 V - 1.15 V

–

OPP_OD: 0.885 V - 1.15 V

–

OPP_HIGH: 0.95 V - 1.25 V

The AVS voltages will be within the above specified ranges.

(6) VD_RTC can optionally be tied to VD_CORE and operate at the VD_CORE AVS voltages.

(7) The power supply must be programmed with the AVS voltages for the MPU and the CORE voltage domain, either just after the ROM

boot or at the earliest possible time in the secondary boot loader before there is significant activity seen on these domains.

Table 5-8 describes the standard processor clocks speed characteristics vs OPP of the device.

Table 5-8. Supported OPP vs Max Frequency(2)

DESCRIPTION

OPP_NOM

OPP_OD

OPP_HIGH

MAX FREQ. (MHz)

VD_MPU

MPU_CLK

750

1176

VD_DSPEVE

DSP_CLK

600

700

750

EVE_FCLK

535

650

VD_IVA

IVA_GCLK

388.3

430

532

VD_GPU

GPU_CLK

425.6

500

532

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