LM4931 datasheet(45/48 Pages) NSC

45 / 48 page

Application Information (Continued)

PLL must also be configured to match the incoming fre-

quency and provide the correct output for all the parts of the

subsystem.

The first register, PLL_M (05h), sets the PLL input divider.

Bits 4:0 of this register are used to set the divider from 4 to

31. It is also possible to bypass the divider (M =1) by setting

PLL_M to 0001b. Setting PLL_M to 0010b gives a divide by

2. Setting PLL_M to 0011b gives a default divider of 4 (as

does setting to 0100b). Values above that are identical to

their base 10 integer values. Bits 7:5 programs the modulus

bits of the PLL feedback divider.

The second PLL register, PLL_N (06h), sets the PLL feed-

back divider. Bits 6:0 are used to set the PLL feedback

divider from divide by 4 to divide by 127. Values set from 0 to

3 are rounded to 4. This register also may be used to alter

the speed of the VCO. Setting bit 7 (FAST_VCO) tunes the

VCO operation for frequencies up to 100MHz. Normally it is

tuned for outputs around 50MHz.

The final PLL register, PLL_P (07h), sets the PLL output

divider. Bits 3:0 set this from divide by 4 to divide by 15.

Inputs of 0 to 3 are rounded to 4. It is also recommended that

P = 4 to keep the VCO around its nominal operating fre-

quency (50MHz if PLL_N bit 7 is clear). The divider modulus

may be set by bits 5:4. Additionally, the dither level for the

PLL is controlled in this register in bits 7:6.

The Audio Clock Requirements table details how different

clock values may be generated for a given input clock.

PLL Loop Filter

The LM4931 demoboard features an onboard second and

third order PLL loop filter. Jumpers (S6-S9) configure the

demoboard to select between the second and third order

PLL loop filters. Reference values for the loop filters are

given in the LM4931 Demo Board Bill of Materials section.

For a more detailed discussion on how to optimize a second

and third order PLL loop filter, please refer to Note 20.

Note 20: http://www.national.com/appinfo/wireless/files/

DeansBook_4_01.pdf.

ANALOG INPUTS AND OUTPUTS

The LM4931 features a high-efficiency class D mono BTL

output for connection to an 8

Ω external speaker. This output

can provide up to 1.1W of power into an 8 ohms load with a

5V analog supply. A single-ended stereo headphone output

is also featured, providing up to 26mW of power per channel

into 32

Ω with a 5V analog supply. The MIC Jack input (JP1)

provides for a low level analog input. Pin 3 provides the

power to the MIC and the positive input of the LM4931. Gain

for the MIC preamp is set in the MIC_GAIN (02h) register.

HIGH EFFICIENCY CLASS D AMPLIFIER FUNCTION

The class D mono output signals generated by the LM4931

consist of two, BTL connected, output signals that pulse

momentarily from near ground potential to VDD. The two

outputs can pulse independently with the exception that they

both may never pulse simultaneously as this would result in

zero volts across the BTL load. The minimum width of each

pulse is approximately 160ns. However, pulses on the same

output can occur sequentially, in which case they are con-

catenated and appear as a single wider pulse to achieve an

effective 100% duty cycle. This results in maximum audio

output power for a given supply voltage and load impedance.

The LM4931 can achieve much higher efficiencies than

class AB amplifiers while maintaining acceptable THD per-

formance. The short (160ns) drive pulses emitted at the

LM4931 outputs means that good efficiency can be obtained

with minimal load inductance. The typical transducer load on

an audio amplifier is quite reactive (inductive). For this rea-

son, the load can act as it’s own filter, so to speak. This

"filter-less" switching amplifier/transducer load combination

is much more attractive economically due to savings in

board space and external component cost by eliminating the

need for a filter.

CLASS D POWER DISSIPATION AND EFFICIENCY

In general terms, efficiency is considered to be the ratio of

useful work output divided by the total energy required to

produce it with the difference being the power dissipated,

typically, in the IC. The key here is “useful” work. For audio

systems, the energy delivered in the audible bands is con-

sidered useful including the distortion products of the input

signal.

Sub-sonic

(DC)

and

super-sonic

components

(>22kHz) are not useful. The difference between the power

flowing from the power supply and the audio band power

being transduced is dissipated in the LM4931 and in the

transducer load. The amount of power dissipation in the

LM4931 is very low. This is because the ON resistance of the

switches used to form the output waveforms is typically less

than 0.25

Ω. This leaves only the transducer load as a po-

tential "sink" for the small excess of input power over audio

band output power. The LM4931 dissipates only a fraction of

the excess power requiring no additional PCB area or cop-

per plane to act as a heat sink.

DUAL MICROPHONE SUPPORT

The LM4931 can be configured to accept two separate

microphone inputs when used in conjunction with the

LMS4684. The LMS4684 is a dual SPDT analog switch that

will allow the MIC_P and MIC_N inputs of the LM4931 to

switch between a differential handset microphone and a

single-ended handsfree microphone. The MIC DETECT

block shown in Figure 16 can be implemented with a micro-

phone jack’s mechanical control pin to set the voltage at the

IN1 and IN2 pins of the LMS4684. The voltage applied at the

IN1 and IN2 pins sets the position of the switch. For a more

detailed discussion on the operation of the analog switch,

please refer to the LMS4684 datasheet.

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