Electrical Characteristics DV

(Notes 1, 2) (Continued)

The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for T

Symbol

Parameter

Conditions

LM4931

Units

(Limits)

Typical

(Note 6)

Limits

(Note 7)

f

IN

Input Frequency on MCLK pin

12

10

20

MHz (min)

MHz (max)

SPI/I

f

SPI

Maximum SPI Frequency

400

4000

kHz (max)

t

SPISETD

SPI Data Setup Time

100

ns (min)

t

SPISETENB

SPI ENB Setup Time

100

ns (min)

t

SPISETHOLDD

SPI Data Hold Time

100

ns (min)

t

SPIHOLDENB

SPI ENB Hold Time

100

ns (min)

t

SPICL

SPI Clock Low Time

500

ns (min)

t

SPICH

SPI Clock High Time

500

ns (min)

t

SPIT

SPI Clock TransitionTime

5

ns (min)

t

CLKI2C

I

400

3400

kHz (max)

t

I2CHOLD

I

100

ns (min)

t

I2CSET

I

100

ns (min)

PCM/I

f

CLKPCM

PCM_CLK Frequency

128

kHz

PCM_CLK Duty Cycle

50

40

60

% (min)

% (max)

f

CLKI2S

I

I

I

1536

3072

kHz

I

50

40

60

% (min)

% (max)

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which

guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit

is given, however, the typical value is a good indication of device performance.

Note 2: All voltages are measured with respect to the relevant GND pin unless otherwise specified. All grounds should be coupled as close as possible to the

device.

derating currents for more information.

Note 4: Human body model: 100pF discharged through a 1.5k

Ω resistor.

Note 5: Machine model: 220pF - 240pF discharged through all pins.

Note 6: Typicals are measured at 25˚C and represent the parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Best operation is achieved by maintaining 3.0V

Note 9: Digital shutdown current is measured with system clock set for PLL output while the PLL is disabled.

Note 10: Disabling or bypassing the PLL will result in an improvement in noise measurements.

Note 11: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

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