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AD603 Datasheet(PDF) 19 Page - Analog Devices |
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AD603 Datasheet(HTML) 19 Page - Analog Devices |
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19 / 24 page ![]() AD603 Rev. H | Page 19 of 24 EVALUATION BOARD The evaluation board of the AD603 enables simple bench-top experimenting to be performed with easy control of the AD603. Built-in flexibility allows convenient configuration to accommodate most operating configurations. Figure 48 is a photograph of the AD603 evaluation board. Figure 48. AD603 Evaluation Board Any dual-polarity power supply capable of providing 20 mA is all that is required, in addition to whatever test equipment the user wishes to perform the intended tests. Referring to the schematic in Figure 49, the input to the VGA is single-ended, ac-coupled, and terminated in 50 Ω to accommodate most commonly available signal generators. GPOS VINP VNEG VOUT VPOS GNEG 4 3 2 1 C1 0.1µF 8 7 6 5 COMM FDBK V+ V– AD603 R2 100Ω GNEG V– W2 C4 V+ C6 0.1µF R3 0Ω C9 VOUT VO R4 453Ω C2 0.1µF W1 + GPOS VIN R1 V+ V+ R5 0Ω C5 0.1µF V– C7 10µF 25V C8 10µF 25V + R7 C3 0.1µF G1 G4 G2 G3 GND R6 Figure 49. Schematic of the AD603 Evaluation Board The output is also ac-coupled and includes a 453 Ω series resistor. The gain of the AD603 is adjusted by connecting a voltage source between the GNEG and GPOS test loops. A 0 Ω resistor, R5, is provided, permitting ground reference of the differential gain control inputs. For other gain configurations, a signal generator may be connected to the test loops, or the GNEG and/or GPOS pins may be biased. Either pin may be driven to either polarity within the common-mode limits of −1.2 V to +2.0 V; therefore, to invert the gain slope, simply consider the GPOS as the reference and drive the GNEG pin positively with respect to GPOS. The AD603 includes built-in gain resistors selectable at the FDBK pin. The board is shipped with the gain at minimum, with a 0 Ω resistor installed in R3. For maximum gain, simply remove R3. Because of the architecture of the AD603, the bandwidth decreases by 10, but the gain range remains at 40 dB. Intermediate gain values may be selected by installing a resistor between the VOUT and FDBK pins. Figure 50, Figure 51, and Figure 52 show the component and circuit side copper patterns and silkscreen. A bill of materials is shown in Table 5. Figure 50. Component Side Copper Figure 51. Circuit Side Copper |
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