8.3 Power Supply Recommendations

The OPA818 is intended for operation on supplies from 6 V (+4/–2 V) to 12 V (±6 V). The OPA818 supports

single-supply, split, as well as balanced and unbalanced bipolar supplies. When operating at supplies less than

8 V, the midsupply is allowed to be outside the input common-mode range of the amplifier. Under these supply

conditions, bias the common-mode voltage appropriately for linear operation. Thus, the limit to lower-supply-

voltage operation is the useable input voltage range for the JFET-input stage. Operating from a single supply of

12 V has numerous advantages. With the negative supply at ground, the dc errors due to the –PSRR term are

minimized. Typically, ac performance improves slightly at 12-V operation with minimal increase in supply current.

8.4 Layout

8.4.1 Layout Guidelines

Achieving optimized performance with a high-frequency amplifier such as the OPA818 requires careful attention

to board layout parasitics and external component types. Recommendations that help optimize performance

include:

1. Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance

on the output and inverting input pins potentially causes instability. On the noninverting input, parasitic

capacitance potentially reacts with the source impedance to cause unintentional band limiting. Ground and

power metal planes act as one of the plates of a capacitor while the signal trace metal acts as the other

separated by PCB dielectric. To reduce this unwanted capacitance, a plane cutout around and underneath

the signal I/O pins on all ground and power planes is recommended. Otherwise, leave the ground and power

planes unbroken elsewhere on the board. When configuring the amplifier as a TIA, if the required feedback

capacitor is less than 0.15 pF, consider using two series resistors, each of half the value of a single resistor

in the feedback loop to minimize the parasitic capacitance from the resistor.

2. Minimize the distance (less than 0.25-in) from the power-supply pins to high-frequency decoupling

capacitors. Use high-quality, 100-pF to 0.1-µF, C0G and NPO-type decoupling capacitors with voltage

ratings at least three times greater than the amplifiers maximum power supplies. This requirement provides

a low-impedance path to the amplifier power-supply pins across the amplifier gain bandwidth specification.

At the device pins, do not allow the ground and power plane layout to be in close proximity to the signal I/O

pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling

capacitors. Always decouple the power-supply connections with these capacitors. Use larger (2.2-µF to

6.8-µF) decoupling capacitors, effective at lower frequency, on the supply pins. Place these larger capacitors

further from the device and share the capacitors among several devices in the same area of the PCB.

3. Careful selection and placement of external components helps preserve the high frequency

performance of the OPA818. Use resistors with low reactance. Surface-mount resistors work best and

allow a tighter overall layout. Metal film and carbon composition axially leaded resistors also provide good

high frequency performance. Again, keep the leads and PCB trace length as short as possible. Never use

wirewound type resistors in a high frequency application. Because the output pin and inverting input pin are

the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any,

as close as possible to the inverting input and the output pin, respectively. Place other network components,

such as noninverting input termination resistors, close to the package. Even with a low parasitic capacitance

shunting the external resistors, excessively high resistor values potentially create significant time constants

that degrade performance. When the OPA818 is configured as a conventional voltage amplifier, keep

the resistor values as low as possible and consistent with the load driving considerations. Lower resistor

values minimize the effect of parasitic capacitance and reduce resistor noise terms. However, because

the feedback network (RF + RG for noninverting and RF for inverting configuration) acts as a load on the

amplifier, lower resistor values increase the dynamic power consumption and the effective load on the output

stage. Transimpedance applications (see Figure 8-2) use feedback resistors as required by the application,

and as long as the feedback compensation capacitor is set considering all parasitic capacitance terms on the

inverting node.

4. Heat dissipation is important for a high voltage device such as the OPA818 . For good thermal relief,

the thermal pad connected to a heat spreading plane that is preferably on the same layer as OPA818 or

connected by as many vias as possible if the plane is on a different layer. Have at least one heat spreading

plane on the same layer as the OPA818 that makes a direct connection to the thermal pad with wide metal

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OPA818

SBOS940B – MAY 2019 – REVISED DECEMBER 2025

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