AD9879-EB datasheet(15/32 Pages) AD

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AD9879

Rev. A | Page 15 of 32

Σ-∆ OUTPUTS

The AD9879 contains an on-chip Σ-Δ output that provides a

digital logic bit stream with an average duty cycle that varies

between 0% and (4095/4096)%, depending on the programmed

code, as shown in Figure 7.

This bit stream can be low-pass filtered to generate a

programmable dc voltage of

VDC = (Σ-Δ Code/4096)(VH) + VL

(8)

where:

VH = VDRVDD − 0.6 V

VL = 0.4 V

In set-top box and cable modem applications, the output can be

used to control external variable gain amplifiers or RF tuners. A

simple single-pole RC low-pass filter provides sufficient

filtering (see Figure 8).

In more demanding applications where additional gain, level

shift, or drive capability is required, a first or second order

active filter might be considered for each Σ-Δ output (see Figure 9).

0x000

0x001

0x002

0x800

0xFFF

4096

× 8 tMCLK

4096

× 8 tMCLK

tMCLK

Figure 7. Σ-∆ Output Signals

Σ-∆

CONTROL

WORD

DAC

DC (VL TO VH)

TYPICAL:

R = 50k

Ω

C = 0.1

µF

f–3dB = 1/(2πRC) = 318Hz

÷8

MCLK

AD9879

Figure 8. Σ-∆ RC Filter

VOUT = (VSD + VOFFSET) (1 + R/R1)/2

TYPICAL:

R = 50k

Ω

C = 0.1

µF

f–3dB = 1/(2πRC) = 318Hz

AD9879

VOFFSET

OP250

VSD

VOUT

Σ-∆

SIGMA-DELTA

Figure 9. Σ-∆ Active Filter with Gain and Offset

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