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AD9879-EB Datasheet(PDF) 28 Page - Analog Devices |
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AD9879-EB Datasheet(HTML) 28 Page - Analog Devices |
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28 / 32 page ![]() AD9879 Rev. A | Page 28 of 32 PCB DESIGN CONSIDERATIONS Although the AD9879 is a mixed-signal device, the part should be treated as an analog component. The on-chip digital circuitry is specially designed to minimize the impact the digital switching noise has on the operation of the analog circuits. The power, grounding, and layout recommendations in this section will help provide the best performance from the MxFE. COMPONENT PLACEMENT Chances for obtaining the best performance from the MxFE are greatly increased if the three following guidelines of component placement are followed. • Manage the path of return currents flowing into the ground plane so that high frequency switching currents from the digital circuits do not flow onto the ground plane under the MxFE or analog circuits. • Keep noisy digital signal paths and sensitive receive signal paths as short as possible. • Keep digital (noise generating) and analog (noise susceptible) circuits as far away from each other as possible. To best manage the return currents, pure digital circuits that generate high switching currents should be closest to the power supply entry. This keeps the highest frequency return current paths short and prevents them from traveling over the sensitive MxFE and analog portions of the ground plane. Also, these circuits should be generously bypassed at each device, further reducing the high frequency ground currents. The MxFE should be placed adjacent to the digital circuits, such that the ground return currents from the digital sections do not flow into the ground plane under the MxFE. The analog circuits should be placed furthest from the power supply. The AD9879 has several pins which are used to decouple sensitive internal nodes. These pins are REFIO, REFB10, REFT10, REFB12, and REFT12. The decoupling capacitors connected to these points should have low ESR and ESL. These capacitors should be placed as close as possible to the MxFE and be connected directly to the analog ground plane. The resistor connected to the FSADJ pin and the RC network connected to the PLLFILT pin should also be placed close to the device and connected directly to the analog ground plane. POWER PLANES AND DECOUPLING The AD9879 evaluation board demonstrates a good power supply distribution and decoupling strategy. The board has four layers: two signal layers, one ground plane, and one power plane. The power plane is split into a 3 VDD section which is used for the 3 V digital logic circuits, a DVDD section that is used to supply the digital supply pins of the AD9879, an AVDD section that is used to supply the analog supply pins of the AD9879, and a VANLG section that supplies the higher voltage analog components on the board. The 3 VDD section typically has the highest frequency currents on the power plane and should be kept the furthest from the MxFE and analog sections of the board. The DVDD portion of the plane brings the current used to power the digital portion of the MxFE to the device. This should be treated similarly to the 3VDD power plane and be kept from going underneath the MxFE or analog components. The MxFE should sit above the AVDD portion of the power plane. The AVDD and DVDD power planes can be fed from the same low noise voltage source. They should be decoupled from each other, however, to prevent the noise generated in the DVDD portion of the MxFE from corrupting the AVDD supply. This can be done by using ferrite beads between the voltage source and DVDD and between the source and AVDD. Both DVDD and AVDD should have a low ESR, bulk decoupling capacitor on the MxFE side of the ferrite as well as low ESR, low ESL de- coupling capacitors on each supply pin (for example, the AD9879 requires 17 power supply decoupling caps). The decoupling caps should be placed as close as possible to the MxFE supply pins. An example of the proper decoupling is shown in the AD9875 evaluation board schematic. |
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