TMS320VC5506 datasheet(20/120 Pages) TI

20 / 120 page

Introduction

October 2006 − Revised January 2008

SPRS375C

Table 2−3. Signal Descriptions (Continued)

TERMINAL

NAME

RESET

CONDITION

BK‡

FUNCTION

I/O/Z†

MULTIPLEXED

SIGNAL NAME

PARALLEL BUS (CONTINUED)

O/Z

EMIF chip select for memory space CE0. The initial state of this pin

depends on the GPIO0 pin.

GPIO0 = 1:

Output,

EMIF.CE0

O/Z

Active-low EMIF chip select for memory space CE0. EMIF.CE0 is selected

when the Parallel Port Mode bit field of the External Bus Selection Register

is set to 00 or 01.

EMIF.CE0

GPIO0 = 0:

Reserved

O/Z

EMIF chip select for memory space CE1. The initial state of this pin

depends on the GPIO0 pin.

GPIO0 = 1:

Output,

EMIF.CE1

O/Z

Active-low EMIF chip select for memory space CE1. EMIF.CE1 is selected

when the Parallel Port Mode bit field of the External Bus Selection Register

is set to 00 or 01.

EMIF.CE1

GPIO0 = 0:

Reserved

O/Z

EMIF chip select for memory space CE2. The initial state of this pin

depends on the GPIO0 pin.

GPIO0 = 1:

Output,

EMIF.CE2

O/Z

Active-low EMIF chip select for memory space CE2. EMIF.CE2 is selected

when the Parallel Port Mode bit field of the External Bus Selection Register

is set to 00 or 01.

EMIF.CE2

GPIO0 = 0:

Reserved

O/Z

EMIF chip select for memory space CE3. The initial state of this pin

depends on the GPIO0 pin.

GPIO0 = 1:

Output,

EMIF.CE3

O/Z

Active-low EMIF chip select for memory space CE3. EMIF.CE3 is selected

when the Parallel Port Mode bit field is of the External Bus Selection

EMIF.CE3

GPIO0 = 0:

Reserved

† I = Input, O = Output, S = Supply, Hi-Z = High-impedance

‡ BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,

PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer

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