HT45F0057 datasheet(37/81 Pages) HOLTEK

37 / 81 page

Rev. 1.30

May 17, 2022

Rev. 1.30

May 17, 2022

HT45F0057

Induction Cooker Flash MCU

HT45F0057

Induction Cooker Flash MCU

Pulse Width Measurement Mode

This mode only exists in the Timer/Event Counter 0. In this mode, the Timer/Event Counter can be

utilised to measure the width of external pulses applied to the external timer pin. To operate in this

mode, the Operating Mode Select bit pair, T0M1/T0M0, in the Timer Control Register must be set

to 1/1.

In this mode, the external timer pin TMR0 or the INT0 signal can be used as the Timer/Event

Counter clock source, however it is not divided by the internal prescaler. After the other bits in the

Timer Control Register have been setup, the enable bit T0ON, which is bit 4 of the Timer Control

counting until an active edge is received on the external timer pin.

If the Active Edge Select bit TMR0E, which is bit 3 of the Timer Control Register, is low, once a

high to low transition has been received on the external timer pin, the Timer/Event Counter will start

counting until the external timer pin returns to its original high level. At this point the enable bit will

be automatically reset to zero and the Timer/Event Counter will stop counting. If the Active Edge

Select bit is high, the Timer/Event Counter will begin counting once a low to high transition has

been received on the external timer pin and stop counting when the external timer pin returns to its

original low level. As before, the enable bit will be automatically reset to zero and the Timer/Event

Counter will stop counting. It is important to note that in the pulse width capture mode, the enable

bit is automatically reset to zero when the external control signal on the external timer pin returns

to its original level, whereas in the other two modes the enable bit can only be reset to zero under

program control.

The residual value in the Timer/Event Counter, which can now be read by the program, therefore

represents the length of the pulse received on the TMR0 pin or INT0 signal. As the enable bit has

now been reset, any further transitions on the external timer pin will be ignored. The timer cannot

begin further pulse width capture until the enable bit is set high again by the program. In this way,

single shot pulse measurements can be easily made.

It should be noted that in this mode the Timer/Event Counter is controlled by logical transitions

on the external timer pin and not by the logic level. When the Timer/Event Counter is full and

overflows, an interrupt signal is generated and the Timer/Event Counter will reload the value already

loaded into the preload register and continue counting. The interrupt can be disabled by ensuring

that the Timer/Event Counter Interrupt Enable bit in the corresponding Interrupt Control Register, it

is reset to zero.

As the TMR0 pin is shared with an I/O pin, to ensure that the pin is configured to operate as a pulse

width capture pin, two things have to be implemented. The first is to ensure that the Operating Mode

Select bits in the Timer Control Register place the Timer/Event Counter in the pulse width capture

mode, the second is to ensure that the port control register configure the pin as an input.

External TMR0

Pin Input

T0ON–with TMR0E = 0

Prescaler Output

Increment

Timer Counter

Timer

Prescaler Output is sampled at every falling edge of T1.

Pulse Width Capture Mode Timing Chart (TMR0E=0)

HT45F0057 Datasheet(PDF) 37 Page - Holtek Semiconductor Inc

HT45F0057 Datasheet(HTML) 37 Page - Holtek Semiconductor Inc

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