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MPD78C10AL Datasheet(PDF) 62 Page - NEC |
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MPD78C10AL Datasheet(HTML) 62 Page - NEC |
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62 / 373 page ![]() CHAPTER 3 INTERNAL BLOCK FUNCTIOS 44 3.5 Memory 3.5.1 µPD78C18/78C17/78C14/78C14A/78C12A/78C11A/78C10A memory configuration The µPD78C18/78C17/78C14/78C14A/78C12A/78C11A/78C10A can address a maximum of 64K bytes of memory. The memory maps are shown in Figures 3-3 to 3-8. The external memory area and the on-chip RAM area can be freely used as program memory and data memory. Since the access time for on-chip memory and external memory are the same, processing can be executed at high speeds. (1) Interrupt start addresses The interrupt start addresses are all fixed as follows: NMI ....................... 0004H INTT0/INTT1 ......... 0008H INT1/INT2 ............. 0010H INTE0/INTE1 ......... 0018H INTEIN/INTAD ...... 0020H INTSR/INTST ........ 0028H SOFTI .................... 0060H (2) Call address table The call address of a 1-byte call instruction (CALT) can be stored in the 64-byte area (for 32 call addresses) from address 0080H to address 00BFH. (3) Specific memory area The reset start address, interrupt start addresses and the call table are allocated to addresses 0000H to 00BFH, and this area takes account of these in use. Addresses 0800H to 0FFFH are directly addressable by a 2-byte call instruction (CALF). On-chip mask ROM allocation is shown below. • µPD78C18 : Addresses 0000H to 7FFFH • µPD78C17 : No mask ROM incorporated • µPD78C14/78C14A : Addresses 0000H to 3FFFH • µPD78C12A : Addresses 0000H to 1FFFH • µPD78C11A : Addresses 0000H to 0FFFH • µPD78C10A : No mask ROM incorporated With the µPD78C17/78C10A, a specific area can be set up externally. |
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