16-Bit DACs with 32-Channel

Sample-and-Hold Outputs

8

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Pin Description (continued)

PIN

TQFP

QFN

NAME

FUNCTION

43

45

OUT18

Output 18

44

46

OUT19

Output 19

45

47

OUT20

Output 20

50

53

OUT21

Output 21

51

54

OUT22

Output 22

52

55

OUT23

Output 23

53

56

OUT24

Output 24

54

57

OUT25

Output 25

56

59

OUT26

Output 26

57

60

OUT27

Output 27

58

61

OUT28

Output 28

59

62

OUT29

Output 29

60

63

OUT30

Output 30

61

64

OUT31

Output 31

63

66

REF

Reference Voltage Input

Figure 1. Functional Diagram

CLOCK

ECLK

CLKSEL

SEQUENCER

SERIAL

INTERFACE

LAST

ADDRESS

SEQUENTIAL

ADDRESS

16-BIT

DAC

GAIN AND

OFFSET

CORRECTION

16 x 32

SRAM

CS

SCLK

DIN

ADDR SELECT

WRITE ENABLE

DATA READY

READ ENABLE

CH

CL

REF

GS

OUT0

OUT31

SAMPLE

D[15:0]

IMMED

RST

2: 1

M

U

X

R

E

G

I

S

T

E

R

R

E

G

I

S

T

E

R

SAMPLE-

AND-HOLD

ARRAY

MAX5631

MAX5632

MAX5633