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DAC39RF10 Datasheet(PDF) 211 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 211 Page - Texas Instruments |
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211 / 232 page  Ext PWR SUPPLY +28.7 to 3.6V VDDA LDO TPS7H1111-SEP SW SUPPLY TPS7H4010-SEP SW SUPPLY TPS7H4010-SEP TPS7H4010-SEP Inv Buck-boost -3.3V +2.2V FB 10u 0.1u 10u 0.1u 10u 0.1u 10u 0.1u +1.0V DVDD, +1.0V (VDDDIG, VDDT, VDDDEA, VDDDEB) VDDCSR VDDA18A, +1.8V VDDA18B, +1.8V +1.8V VDDIO, +1.8V VDDCLK18, +1.8V VDDSYS18, +1.8V VDDR18, +1.8V VEExA, -1.8V LDO TPS7H1210-SEP 10u 0.1u 10u 0.1u VEExB, -1.8V LDO TPS7H1210-SEP 10u 0.1u 10u 0.1u VDDL LDO TPS7H1111-SEP FB FB 10u 0.1u VDDLA, +1.0V FC FC VDDLB, +1.0V +1.0V VDDCLK10, +1.0V 0.1u FC FB FC FC FC FC FC FC FC FC FC NOTES: FB = Ferrite Bead FC = 3-Terminal Feedthru Cap FC LDO TPS7H1111-SEP 10u 0.1u 0.1u FB +1.0V -1.8V -1.8V SW SUPPLY TPS7H4010-SEP FB +3.0V NOTE: use separate LDOs if best DAC output isola on is needed Figure 9-21. Recommended -SEP Power Supply Block Diagram The VDDA supply is regulated by an LDO, or low-noise drop-out linear regulator, with a +1.8V output and is further broken down into the following subgroup power domains: • VDDA: VDDA18A, VDDA18B • VDDIO • VDDCSR: VDDCLK18, VDDSYS18, VDDR18 Each device supply can be tied to a single LDO but are isolated with a ferrite bead and/or three-terminal capacitor or similar. The VDDL supply is +1V and is further broken down into VDDLA and VDDLB. Each device supply can be tied to a single LDO but are isolated with a ferrite bead and/or three-terminal capacitor or similar. The VDDCLK10 supply is +1V and is the most sensitive for achieving the best phase noise performance. VDDCLK10 should be isolated to a LDO by itself to prevent noise from other 1.0V supplies coupling into the clock path. The DVDD supply is +1V and can be directly connected to a switching power supply. The DVDD encompasses the following device supplies, VDDDIG10, VDDT, VDDEA and VDDEB, which can all be connected together. No further isolation with a ferrite bead and/or three-terminal capacitor or similar is required. The VEEx supply is -1.8V derived from a single LDO and is further broken down into VEEAM18 and VEEBM18, which are isolated with a ferrite bead and/or three-terminal capacitor or similar. It is also highly recommended to follow these important power supply design considerations: 1. Decouple all power supply rails and bus voltages as they come onto the system board. Further place additional decoupling at or near the DAC itself for each power domain. Typically, one decoupling capacitor per power supply pin is suffice unless specified in the data sheet or EVM assembly. www.ti.com DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 211 Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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