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DAC39RF10 Datasheet(PDF) 213 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 213 Page - Texas Instruments |
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213 / 232 page ![]() 9.4 Layout 9.4.1 Layout Guidelines and Example There are many critical signal connections that require specific care and attention during PC board design: 1. DAC analog output signals 2. Sampling clock 3. Serdes (JESD204x) data inputs 4. Power supplies 5. Power and grounding strategy There are many considerations to take note of when developing a high-speed PCB design. Here are a few recommendations and example figures to follow for any high-speed PCB design: 1. Route using loosely coupled 100Ω differential traces when possible on the Serdes inputs. This routing minimizes impact of corners and length-matching serpentines on pair impedance. 2. Provide adequate pair-to-pair spacing to minimize crosstalk, especially with loosely coupled differential traces. Tightly coupled differential traces can be used to reduce self-radiated noise or to improve neighboring trace noise immunity when adequate spacing cannot be provided. 3. Provide adequate ground plane pour spacing to minimize coupling with the high-speed traces. Any ground plane pour must have sufficient via connections to the main ground plane of the board. Do not use floating or poorly connected ground pours. 4. Use smoothly radiused corners and avoid 45- or 90-degree bends to reduce impedance mismatches on all high-speed inputs/outputs for both analog and digital signal traces. See Figure 9-22 as an example. www.ti.com DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 213 Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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