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RL78 Datasheet(PDF) 68 Page - Renesas Technology Corp |
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RL78 Datasheet(HTML) 68 Page - Renesas Technology Corp |
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68 / 146 page ![]() RL78/F15 3. ELECTRICAL SPECIFICATIONS (GRADE L) R01DS0461EJ0110 Rev.1.10 Page 68 of 143 Jan 30, 2026 CSI mode connection diagram (during communication at different potential) User's device RL78 microcontroller SCKp SSIp SCK SI Vb Rb Vb Rb SOp SIp SO <Master> Caution Select the TTL input buffer for the SIp pin and N-ch open-drain output mode for the SOp pin and SCKp pin. Remarks 1. Rb [Ω]: Communication line (SCKp, SOp) pull-up resistance, Cb [F]: Communication line (SOp, SCKp) load capacitance, Vb [V]: Communication line voltage 2. p: CSIp (p = 00, 01, 10, 11), m: Unit m (m = 0, 1), n: Channel n (n = 0, 1) 3. AC characteristics of the serial array unit during communication at different potential in CSI mode are measured with the VIH and VIL below: When 4.0 V ≤ EVDD0 ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V: VIH = 2.2 V, VIL = 0.8 V |
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