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4.1

Notices Concerning JTAG (IEEE 1149.1) Boundary Scan Test Capability

4.1.1

Initialization Requirements for Boundary Scan Test

4.1.2

Boundary Scan Description Language (BSDL) Model

4.2

Documentation Support

TMS320VC5502

Fixed-Point Digital Signal Processor

SPRS166J – APRIL 2001 – REVISED AUGUST 2006

The TMS320VC5502 uses the JTAG port for boundary scan tests, emulation capability and factory test

purposes. To use boundary scan test, the EMU0 and EMU1/OFF pins must be held HIGH through a rising

edge of the TRST signal prior to the first scan. This operation selects the appropriate TAP control for

boundary scan. If at any time during a boundary scan test a rising edge of TRST occurs when EMU0 or

EMU1/OFF are not high, a factory test mode may be selected preventing boundary scan test from being

completed. For this reason, it is recommended that EMU0 and EMU1/OFF be pulled or driven high at all

times during boundary scan test.

BSDL models are available on the web in the TMS320VC5502 product folder under the “simulation

models” section.

Extensive documentation supports all TMS320™ DSP family of devices from product announcement

through applications development. The following types of documentation are available to support the

design and use of the TMS320C5000™ platform of DSPs:

• Device-specific data sheets

• Complete user's guides

• Development support tools

• Hardware and software application reports

• MicroStar BGA Packaging Reference Guide (literature number SSYZ015)

TMS320C55x reference documentation that includes, but is not limited to, the following:

SPRU371:

TMS320C55x DSP CPU Reference Guide.

Describes the architecture, registers, and

operation of the CPU for the TMS320C55x™ digital signal processors (DSPs).

SPRU374:

TMS320C55x

DSP

Mnemonic

Instruction

Set

Reference

Guide.

Describes

the

TMS320C55x DSP mnemonic instructions individually. Also includes a summary of the

instruction set, a list of the instruction opcodes, and a cross-reference to the algebraic

instruction set.

SPRU375:

TMS320C55x DSP Algebraic Instruction Set Reference Guide. Describes the TMS320C55x

DSP algebraic instructions individually. Also includes a summary of the instruction set, a list

of the instruction opcodes, and a cross-reference to the mnemonic instruction set.

SPRU376:

TMS320C55x DSP Programmer's Guide. Describes ways to optimize C and assembly code

for the TMS320C55x™ DSPs and explains how to write code that uses special features and

instructions of the DSP.

SPRU280:

TMS320C55x Assembly Language Tools User's Guide. Describes the assembly language

tools (assembler, linker, and other tools used to develop assembly language code),

assembler directives, macros, common object file format, and symbolic debugging directives

for TMS320C55x devices.

SPRU630:

TMS320VC5501/5502 DSP Instruction Cache Reference Guide. Describes the features and

operation of the instruction cache on the TMS320VC5501 and TMS320VC5502 digital signal

processors (DSPs) in the TMS320C55x (C55x) DSP generation. When instructions reside in

external memory, the instruction cache can improve the overall system performance by

buffering the most recent instructions accessed by the CPU.

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TMS320VC5502 Datasheet(PDF) 125 Page - Texas Instruments

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