LAN9312 datasheet(148/458 Pages) SMSC

Part #	LAN9312

Description	High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

PDF	458 Pages

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Manufacturer	SMSC [SMSC Corporation]

Direct Link	http://www.smsc.com

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface

Datasheet

Revision 1.2 (04-08-08)

148

SMSC LAN9312

DATASHEET

10.2.3.7

WRITE (Write Location)

If erase/write operations are enabled in the EEPROM, this command will cause the contents of the

EEPROM Data Register (E2P_DATA) to be written to the EEPROM location pointed to by the

EPC_ADDRESS field of the EEPROM Command Register (E2P_CMD). The EPC_TIMEOUT bit of the

EEPROM Command Register (E2P_CMD) is set if the EEPROM does not respond within 30mS.

10.2.3.8

WRAL (Write All)

If erase/write operations are enabled in the EEPROM, this command will cause the contents of the

EEPROM Data Register (E2P_DATA) to be written to every EEPROM memory location. The

EPC_TIMEOUT bit of the EEPROM Command Register (E2P_CMD) is set if the EEPROM does not

respond within 30mS.

Figure 10.12 EEPROM WRITE Cycle

Figure 10.13 EEPROM WRAL Cycle

EECLK

EEDI

EEDO

EECS

EECLK

EEDI

EEDO

EECS

LAN9312 Datasheet(PDF) 148 Page - SMSC Corporation