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LAN9312 Datasheet(PDF) 176 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 176 Page - SMSC Corporation |
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176 / 458 page ![]() High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet Revision 1.2 (04-08-08) 176 SMSC LAN9312 DATASHEET 5 RX Data FIFO Level Interrupt (RDFL) This interrupt is generated when the RX Data FIFO reaches the programmed level in the RX Space Available Level field of the FIFO Level Interrupt Register (FIFO_INT). R/WC 0b 4 RX Status FIFO Full Interrupt (RSFF) This interrupt is generated when the RX Status FIFO is full. R/WC 0b 3 RX Status FIFO Level Interrupt (RSFL) This interrupt is generated when the RX Status FIFO reaches the programmed level in the RX Status Level field of the FIFO Level Interrupt Register (FIFO_INT). R/WC 0b 2:0 RESERVED RO - BITS DESCRIPTION TYPE DEFAULT |
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